soc: qcom: llcc: Add write-cache cacheable support
authorSai Prakash Ranjan <quic_saipraka@quicinc.com>
Fri, 28 Jan 2022 07:47:10 +0000 (13:17 +0530)
committerBjorn Andersson <bjorn.andersson@linaro.org>
Fri, 11 Feb 2022 00:29:33 +0000 (18:29 -0600)
commit2b8175a1f108361c2c1a11b27415631994efbfce
tree1e976491b0ee5615eb26ca77ca2513e386718c8d
parent8008e7902f28eb9e5459b21d375b3e5b4090efff
soc: qcom: llcc: Add write-cache cacheable support

Newer SoCs with LLCC IP version 2.1.0.0 and later support write
sub-cache cacheable feature. Use a separate llcc_slice_config member
"write_scid_cacheable_en" to identify this feature and program
LLCC_TRP_SCID_WRSC_CACHEABLE_EN register to enable it.

Signed-off-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com>
Tested-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/83372c8178f579d055ec58212ce5af5d55abadd4.1643355594.git.quic_saipraka@quicinc.com
drivers/soc/qcom/llcc-qcom.c