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RISC-V: Enable Microchip PolarFire ICICLE SoC
authorAtish Patra <atish.patra@wdc.com>
Wed, 3 Mar 2021 20:02:52 +0000 (12:02 -0800)
committerPalmer Dabbelt <palmerdabbelt@google.com>
Mon, 26 Apr 2021 15:31:32 +0000 (08:31 -0700)
commit2951162094e61f574b0ddf886c783ace65049450
tree4d518abdb46cab13b746c5c28068896d2918cab5tree | snapshot
parent0fa6107eca4186adc6adda3b54c8b942477066c1commit | diff
RISC-V: Enable Microchip PolarFire ICICLE SoC

Enable Microchip PolarFire ICICLE soc config in defconfig.
It allows the default upstream kernel to boot on PolarFire ICICLE board.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
arch/riscv/configs/defconfig diff | blob | history
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