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(parent: fcfe0bd) | patch
drm/i915/icl: Define DSI mode ctl register
authorMadhav Chauhan <madhav.chauhan@intel.com>
Thu, 5 Jul 2018 13:49:34 +0000 (19:19 +0530)
committerJani Nikula <jani.nikula@intel.com>
Fri, 6 Jul 2018 09:14:15 +0000 (12:14 +0300)
commit21652f3b0d48749e3ba0d332d2b39cc18eacb1c0
treeb9e4cbf606c743ef4eaf167a38b8417a245eec10tree
parentfcfe0bdcb1911a4ff6ab6b6264e3323745178025commit | diff
drm/i915/icl: Define DSI mode ctl register

This patch defines DSI IO mode control register and it's bits
used while enabling IO power for DSI.

Signed-off-by: Madhav Chauhan <madhav.chauhan@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1530798591-2077-4-git-send-email-madhav.chauhan@intel.com
drivers/gpu/drm/i915/i915_reg.h diff | blob | history
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