x86/mm: Micro-optimise clflush_cache_range()
authorChris Wilson <chris@chris-wilson.co.uk>
Fri, 8 Jan 2016 09:55:33 +0000 (09:55 +0000)
committerThomas Gleixner <tglx@linutronix.de>
Fri, 8 Jan 2016 18:27:39 +0000 (19:27 +0100)
commit1f1a89ac05f6e88aa341e86e57435fdbb1177c0c
treef2ccbc5afe94040c6ba411038e91c63d1ea90101
parent2039e6acaf94d83ec6b6d9f3d0bce7ea1f099918
x86/mm: Micro-optimise clflush_cache_range()

Whilst inspecting the asm for clflush_cache_range() and some perf profiles
that required extensive flushing of single cachelines (from part of the
intel-gpu-tools GPU benchmarks), we noticed that gcc was reloading
boot_cpu_data.x86_clflush_size on every iteration of the loop. We can
manually hoist that read which perf regarded as taking ~25% of the
function time for a single cacheline flush.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Ross Zwisler <ross.zwisler@linux.intel.com>
Acked-by: "H. Peter Anvin" <hpa@zytor.com>
Cc: Toshi Kani <toshi.kani@hpe.com>
Cc: Borislav Petkov <bp@suse.de>
Cc: Luis R. Rodriguez <mcgrof@suse.com>
Cc: Stephen Rothwell <sfr@canb.auug.org.au>
Cc: Sai Praneeth <sai.praneeth.prakhya@intel.com>
Link: http://lkml.kernel.org/r/1452246933-10890-1-git-send-email-chris@chris-wilson.co.uk
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
arch/x86/mm/pageattr.c