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(parent: c4a1dd9) | patch
EDAC, skx, i10nm: Fix source ID register offset
authorQiuxu Zhuo <qiuxu.zhuo@intel.com>
Wed, 26 Jun 2019 06:16:55 +0000 (14:16 +0800)
committerTony Luck <tony.luck@intel.com>
Wed, 26 Jun 2019 17:07:27 +0000 (10:07 -0700)
commit1dc78f1ffa3a386b986b659884952d816021f38f
tree78b8187ce312d5e0350e8c4ff25cf8e2a5bfb850tree
parentc4a1dd9e83ceceef6ffba82b8b274ab9b929ea14commit | diff
EDAC, skx, i10nm: Fix source ID register offset

The source ID register offset for Skylake server is 0xf0, while for
Icelake server is 0xf8. Pass the correct offset to get the source ID.

Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
drivers/edac/i10nm_base.c diff | blob | history
drivers/edac/skx_base.c diff | blob | history
drivers/edac/skx_common.c diff | blob | history
drivers/edac/skx_common.h diff | blob | history
MicroBlaze GIT Repository