RISC-V: Filter ISA and MMU values in cpuinfo
authorPalmer Dabbelt <palmer@sifive.com>
Tue, 2 Oct 2018 19:14:56 +0000 (12:14 -0700)
committerPalmer Dabbelt <palmer@sifive.com>
Tue, 23 Oct 2018 00:03:35 +0000 (17:03 -0700)
commit19ccf29bb18f08a4583aa899a8cc8c11e5ea85a6
treee8dade2d43c99190dfe9c58a278790a4b034b527
parent566d6c428eadf9dc06df8b2195dff58d9a97c9e6
RISC-V: Filter ISA and MMU values in cpuinfo

We shouldn't be directly passing device tree values to userspace, both
because there could be mistakes in device trees and because the kernel
doesn't support arbitrary ISAs.

Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
[Atish: checkpatch fix and code comment formatting update]
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
arch/riscv/kernel/cpu.c