drm/i915: always use masks on FW regs
authorDaniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Wed, 20 Mar 2019 12:27:32 +0000 (12:27 +0000)
committerChris Wilson <chris@chris-wilson.co.uk>
Wed, 20 Mar 2019 20:25:45 +0000 (20:25 +0000)
commit159367bb9e7439b8c1c4c066596a1663b901647b
tree3433055aa6a669a8f970fdf338017c9015d8d247
parent7264aebb81d15aa6bbed650c816bba90f026bc35
drm/i915: always use masks on FW regs

Upper bits are reserved on gen6, so no issue if we write them. Note that
we're already doing this in the non-MT case of IVB, which uses the same
register.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190320122732.14512-1-chris@chris-wilson.co.uk
drivers/gpu/drm/i915/intel_uncore.c
drivers/gpu/drm/i915/intel_uncore.h