arm64: mm: Always update TCR_EL1 from __cpu_set_tcr_t0sz()
authorJames Morse <james.morse@arm.com>
Mon, 25 Jan 2021 19:19:12 +0000 (14:19 -0500)
committerWill Deacon <will@kernel.org>
Wed, 27 Jan 2021 15:41:12 +0000 (15:41 +0000)
commit1401bef703a48cf79c674215f702a1435362beae
tree4cf112ae7b4d421531654a377f345aa036c4a102
parent5de59884ac0ec56007e4aa8226ee259aa669be80
arm64: mm: Always update TCR_EL1 from __cpu_set_tcr_t0sz()

Because only the idmap sets a non-standard T0SZ, __cpu_set_tcr_t0sz()
can check for platforms that need to do this using
__cpu_uses_extended_idmap() before doing its work.

The idmap is only built with enough levels, (and T0SZ bits) to map
its single page.

To allow hibernate, and then kexec to idmap their single page copy
routines, __cpu_set_tcr_t0sz() needs to consider additional users,
who may need a different number of levels/T0SZ-bits to the idmap.
(i.e. VA_BITS may be enough for the idmap, but not hibernate/kexec)

Always read TCR_EL1, and check whether any work needs doing for
this request. __cpu_uses_extended_idmap() remains as it is used
by KVM, whose idmap is also part of the kernel image.

This mostly affects the cpuidle path, where we now get an extra
system register read .

CC: Lorenzo Pieralisi <Lorenzo.Pieralisi@arm.com>
CC: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: James Morse <james.morse@arm.com>
Signed-off-by: Pavel Tatashin <pasha.tatashin@soleen.com>
Link: https://lore.kernel.org/r/20210125191923.1060122-8-pasha.tatashin@soleen.com
Signed-off-by: Will Deacon <will@kernel.org>
arch/arm64/include/asm/mmu_context.h