drm/i915/lnl: Program PKGC_LATENCY register
authorSuraj Kandpal <suraj.kandpal@intel.com>
Mon, 19 Feb 2024 06:36:38 +0000 (12:06 +0530)
committerAnimesh Manna <animesh.manna@intel.com>
Fri, 23 Feb 2024 06:20:47 +0000 (11:50 +0530)
commit131288c4681bbc2727f20c4b31c89a93464aa9ca
tree151ae904cd88ebe03b7cc371c6900a3fa0d139d0
parent3d890f32877376ac689f752d8b74ecaea0c42232
drm/i915/lnl: Program PKGC_LATENCY register

If fixed refresh rate program the PKGC_LATENCY register
with the highest latency from level 1 and above LP registers
and program ADDED_WAKE_TIME = DSB execution time.
else program PKGC_LATENCY with all 1's and ADDED_WAKE_TIME as 0.
This is used to improve package C residency by sending the highest
latency tolerance requirement (LTR) when the planes are done with the
frame until the next frame programming window (set context latency,
window 2) starts.
Bspec: 68986

--v2
-Fix indentation [Chaitanya]

--v3
-Take into account if fixed refrersh rate or not [Vinod]
-Added wake time dependengt on DSB execution time [Vinod]
-Use REG_FIELD_PREP [Jani]
-Call program_pkgc_latency from appropriate place [Jani]
-no need for the ~0 while setting max latency [Jani]
-change commit message to add the new changes made in.

--v4
-Remove extra blank line [Vinod]
-move the vrr.enable check to previous loop [Vinod]

Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240219063638.1467114-1-suraj.kandpal@intel.com
drivers/gpu/drm/i915/display/intel_dsb.c
drivers/gpu/drm/i915/display/skl_watermark.c
drivers/gpu/drm/i915/display/skl_watermark.h