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(parent: 9d5fd37) | patch
drm/i915/tgl: Update cdclk voltage level settings
authorMatt Roper <matthew.d.roper@intel.com>
Fri, 7 Feb 2020 00:14:17 +0000 (16:14 -0800)
committerMatt Roper <matthew.d.roper@intel.com>
Mon, 10 Feb 2020 17:51:44 +0000 (09:51 -0800)
commit0fde0b1daac97ae6e51a85e44cd461a8366d8997
tree208f59264f0c29fc1e32b3d4e8d1cd0fb60c57e8tree
parent9d5fd37ed7e26efdbe90f492d7eb8b53dcdb61d6commit | diff
drm/i915/tgl: Update cdclk voltage level settings

A recent bspec update added an extra voltage level that we didn't have
on ICL and new criteria for selecting the level.

Bspec: 49208
Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200207001417.1229251-2-matthew.d.roper@intel.com
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
drivers/gpu/drm/i915/display/intel_cdclk.c diff | blob | history
drivers/gpu/drm/i915/display/intel_ddi.c diff | blob | history
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