powerpc/pseries/iommu: Replace hard-coded page shift
authorLeonardo Bras <leobras.c@gmail.com>
Tue, 17 Aug 2021 06:39:19 +0000 (03:39 -0300)
committerMichael Ellerman <mpe@ellerman.id.au>
Thu, 26 Aug 2021 14:56:54 +0000 (00:56 +1000)
commit0c634bafe3bbee7a36dca7f1277057e05bf14d91
tree7937d085d5c2064e683db01cbee4ec053a569739
parent9a245d0e1f006bc7ccf0285d0d520ed304d00c4a
powerpc/pseries/iommu: Replace hard-coded page shift

Some functions assume IOMMU page size can only be 4K (pageshift == 12).
Update them to accept any page size passed, so we can use 64K pages.

In the process, some defines like TCE_SHIFT were made obsolete, and then
removed.

IODA3 Revision 3.0_prd1 (OpenPowerFoundation), Figures 3.4 and 3.5 show
a RPN of 52-bit, and considers a 12-bit pageshift, so there should be
no need of using TCE_RPN_MASK, which masks out any bit after 40 in rpn.
It's usage removed from tce_build_pSeries(), tce_build_pSeriesLP(), and
tce_buildmulti_pSeriesLP().

Most places had a tbl struct, so using tbl->it_page_shift was simple.
tce_free_pSeriesLP() was a special case, since callers not always have a
tbl struct, so adding a tceshift parameter seems the right thing to do.

Signed-off-by: Leonardo Bras <leobras.c@gmail.com>
Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20210817063929.38701-2-leobras.c@gmail.com
arch/powerpc/include/asm/tce.h
arch/powerpc/platforms/pseries/iommu.c