x86/tlb: Refactor CR4 setting and shadow write
authorNadav Amit <namit@vmware.com>
Sat, 25 Nov 2017 03:29:06 +0000 (19:29 -0800)
committerThomas Gleixner <tglx@linutronix.de>
Sat, 25 Nov 2017 12:28:43 +0000 (13:28 +0100)
commit0c3292ca8025c5aef44dc389ac3a6bf4a325e0be
tree1291f883a1b0905beba720250956ba29fbe036e0
parent12a78d43de767eaf8fb272facb7a7b6f2dc6a9df
x86/tlb: Refactor CR4 setting and shadow write

Refactor the write to CR4 and its shadow value. This is done in
preparation for the addition of an assertion to check that IRQs are
disabled during CR4 update.

No functional change.

Signed-off-by: Nadav Amit <namit@vmware.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: nadav.amit@gmail.com
Cc: Andy Lutomirski <luto@kernel.org>
Cc: linux-edac@vger.kernel.org
Link: https://lkml.kernel.org/r/20171125032907.2241-2-namit@vmware.com
arch/x86/include/asm/tlbflush.h