riscv: errata: Fix the PAUSE Opcode for MIPS P8700
authorDjordje Todorovic <djordje.todorovic@htecgroup.com>
Thu, 24 Jul 2025 15:23:31 +0000 (17:23 +0200)
committerPaul Walmsley <pjw@kernel.org>
Fri, 19 Sep 2025 16:33:56 +0000 (10:33 -0600)
commit0b0ca959d20689fece038954bbf1d7b14c0b11c3
tree9356093f02b93df5c4f6a27dfff39379a841a20a
parentc9a9fc23228f447beefe473224207944521b14a1
riscv: errata: Fix the PAUSE Opcode for MIPS P8700

Add ERRATA_MIPS and ERRATA_MIPS_P8700_PAUSE_OPCODE configs.
Handle errata for the MIPS PAUSE instruction.

Signed-off-by: Djordje Todorovic <djordje.todorovic@htecgroup.com>
Signed-off-by: Aleksandar Rikalo <arikalo@gmail.com>
Signed-off-by: Raj Vishwanathan4 <rvishwanathan@mips.com>
Signed-off-by: Aleksa Paunovic <aleksa.paunovic@htecgroup.com>
Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Link: https://lore.kernel.org/r/20250724-p8700-pause-v5-7-a6cbbe1c3412@htecgroup.com
[pjw@kernel.org: updated to apply and compile; fixed a checkpatch issue]
Signed-off-by: Paul Walmsley <pjw@kernel.org>
12 files changed:
arch/riscv/Kconfig.errata
arch/riscv/errata/Makefile
arch/riscv/errata/mips/Makefile [new file with mode: 0644]
arch/riscv/errata/mips/errata.c [new file with mode: 0644]
arch/riscv/include/asm/alternative.h
arch/riscv/include/asm/cmpxchg.h
arch/riscv/include/asm/errata_list.h
arch/riscv/include/asm/errata_list_vendors.h
arch/riscv/include/asm/vdso/processor.h
arch/riscv/kernel/alternative.c
arch/riscv/kernel/entry.S
arch/riscv/mm/init.c