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(parent: ecf71fb) | patch
perf/x86/msr: Add Tremont support
authorKan Liang <kan.liang@linux.intel.com>
Tue, 28 Jan 2020 18:31:19 +0000 (10:31 -0800)
committerIngo Molnar <mingo@kernel.org>
Tue, 11 Feb 2020 12:17:50 +0000 (13:17 +0100)
commit0aa0e0d6b34b89649e6b5882a7e025a0eb9bd832
treef20e489f58d062ea1a8c7b8e7484639fa961f07ctree
parentecf71fbccb9ac5cb964eb7de59bb9da3755b7885commit | diff
perf/x86/msr: Add Tremont support

Tremont is Intel's successor to Goldmont Plus. SMI_COUNT MSR is also
supported.

Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Reviewed-by: Andi Kleen <ak@linux.intel.com>
Link: https://lkml.kernel.org/r/1580236279-35492-3-git-send-email-kan.liang@linux.intel.com
arch/x86/events/msr.c diff | blob | history
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