drm/xe: Enforce correct user fence signaling order using
authorMatthew Brost <matthew.brost@intel.com>
Fri, 31 Oct 2025 23:40:45 +0000 (16:40 -0700)
committerLucas De Marchi <lucas.demarchi@intel.com>
Fri, 7 Nov 2025 11:55:19 +0000 (03:55 -0800)
commit0995c2fc39b0f998d40f5d276f67ae22fc1c37c3
treedd7b742e3844a448fcbbc23e92182e3765d4e56d
parentb11a020d914c3b7628f56a9ea476a5b03679489b
drm/xe: Enforce correct user fence signaling order using

Prevent application hangs caused by out-of-order fence signaling when
user fences are attached. Use drm_syncobj (via dma-fence-chain) to
guarantee that each user fence signals in order, regardless of the
signaling order of the attached fences. Ensure user fence writebacks to
user space occur in the correct sequence.

v7:
 - Skip drm_syncbj create of error (CI)

Fixes: dd08ebf6c352 ("drm/xe: Introduce a new DRM driver for Intel GPUs")
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Link: https://patch.msgid.link/20251031234050.3043507-2-matthew.brost@intel.com
(cherry picked from commit adda4e855ab6409a3edaa585293f1f2069ab7299)
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
drivers/gpu/drm/xe/xe_exec.c
drivers/gpu/drm/xe/xe_exec_queue.c
drivers/gpu/drm/xe/xe_exec_queue_types.h
drivers/gpu/drm/xe/xe_oa.c
drivers/gpu/drm/xe/xe_oa_types.h
drivers/gpu/drm/xe/xe_sync.c
drivers/gpu/drm/xe/xe_sync.h
drivers/gpu/drm/xe/xe_sync_types.h
drivers/gpu/drm/xe/xe_vm.c