drm/i915/dsb: single register write function for DSB.
authorJani Nikula <jani.nikula@intel.com>
Mon, 23 Sep 2019 07:09:23 +0000 (10:09 +0300)
committerJani Nikula <jani.nikula@intel.com>
Mon, 23 Sep 2019 07:09:23 +0000 (10:09 +0300)
commit061489c65ff57ee9f757d7a519fb9a09e5fbadd6
tree450d108d154a59614ccf59a9d10af54cb14fff4d
parent67f3b58f3bac975f35c312fd8876edb599cc24be
drm/i915/dsb: single register write function for DSB.

DSB support single register write through opcode 0x1. Generic
api created which accumulate all single register write in a batch
buffer and once DSB is triggered, it will program all the registers
at the same time.

v1: Initial version.
v2: Unused macro removed and cosmetic changes done. (Shashank)
v3: set free_pos to zero in dsb-put() instead dsb-get() and
a cosmetic change. (Shashank)
v4: macro of indexed-write is moved. (Shashank)

Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Shashank Sharma <shashank.sharma@intel.com>
Reviewed-by: Shashank Sharma <shashank.sharma@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190920115930.27829-4-animesh.manna@intel.com
drivers/gpu/drm/i915/display/intel_dsb.c
drivers/gpu/drm/i915/display/intel_dsb.h