arm64: dts: renesas: rzg3s-smarc-som: Enable SDHI2
authorClaudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Mon, 16 Oct 2023 10:53:43 +0000 (13:53 +0300)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 20 Nov 2023 08:19:06 +0000 (09:19 +0100)
commit00cbba479142a3c962a44b127db4ab6cdc2b2b70
treee9b36211e1d84911d15a82a73529be317a58d376
parent51dad0523b1e94493c9dd8596bd4a9d0d88d8fcb
arm64: dts: renesas: rzg3s-smarc-som: Enable SDHI2

Add SDHI2 to RZ/G3S Smarc SoM.  SDHI2 pins are multiplexed with SCIF1,
SSI0, IRQ0, IRQ1.  The selection b/w SDHI2 and SCIF1, SSI0, IRQ0, IRQ1
is done with a switch button.  To be able to select b/w these a
compilation flag has been added (SW_SD2_EN) at the moment being
instantiated to select SDHI2.

Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20231016105344.294096-2-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi