X-Git-Url: http://git.monstr.eu/?a=blobdiff_plain;f=Documentation%2Fdevicetree%2Fbindings%2Fpower%2Freset%2Focelot-reset.txt;h=c5de7b555feb9a133c7df66276e558a0a9936dbe;hb=52cd5f9c22eeef26d05f9d9338ba4eb38f14dd3a;hp=4d530d8154848b68cdbec4cf5698251df1e0a76d;hpb=29701d69b98d0a132abd63fe2e51125f478fbc53;p=linux-2.6-microblaze.git

diff --git a/Documentation/devicetree/bindings/power/reset/ocelot-reset.txt b/Documentation/devicetree/bindings/power/reset/ocelot-reset.txt
index 4d530d815484..c5de7b555feb 100644
--- a/Documentation/devicetree/bindings/power/reset/ocelot-reset.txt
+++ b/Documentation/devicetree/bindings/power/reset/ocelot-reset.txt
@@ -7,7 +7,9 @@ The reset registers are both present in the MSCC vcoreiii MIPS and
 microchip Sparx5 armv8 SoC's.
 
 Required Properties:
- - compatible: "mscc,ocelot-chip-reset" or "microchip,sparx5-chip-reset"
+
+ - compatible: "mscc,ocelot-chip-reset", "mscc,luton-chip-reset",
+   "mscc,jaguar2-chip-reset" or "microchip,sparx5-chip-reset"
 
 Example:
 	reset@1070008 {