X-Git-Url: http://git.monstr.eu/?a=blobdiff_plain;ds=sidebyside;f=arch%2Fx86%2Fevents%2Fintel%2Fcore.c;h=3a77f66730d06e59a0ebc77854a28bfe8b4275e0;hb=2594b713c12faa8976f97d8d16b3d8b343ff4ea2;hp=062bf8968c0e50e916e9b04249ff42cacb3a3223;hpb=293649307ef9abcd4f83f6dac4d4400dfd97c936;p=linux-2.6-microblaze.git

diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index 062bf8968c0e..3a77f66730d0 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -6259,7 +6259,7 @@ __init int intel_pmu_init(void)
 	 * Check all LBT MSR here.
 	 * Disable LBR access if any LBR MSRs can not be accessed.
 	 */
-	if (x86_pmu.lbr_nr && !check_msr(x86_pmu.lbr_tos, 0x3UL))
+	if (x86_pmu.lbr_tos && !check_msr(x86_pmu.lbr_tos, 0x3UL))
 		x86_pmu.lbr_nr = 0;
 	for (i = 0; i < x86_pmu.lbr_nr; i++) {
 		if (!(check_msr(x86_pmu.lbr_from + i, 0xffffUL) &&