KVM: arm/arm64: vgic: Get rid of live_lrs
[linux-2.6-microblaze.git] / virt / kvm / arm / hyp / vgic-v2-sr.c
index d3d3b9b..34b37ce 100644 (file)
@@ -26,27 +26,23 @@ static void __hyp_text save_maint_int_state(struct kvm_vcpu *vcpu,
                                            void __iomem *base)
 {
        struct vgic_v2_cpu_if *cpu_if = &vcpu->arch.vgic_cpu.vgic_v2;
-       int nr_lr = (kern_hyp_va(&kvm_vgic_global_state))->nr_lr;
+       u64 used_lrs = vcpu->arch.vgic_cpu.used_lrs;
        u32 eisr0, eisr1;
        int i;
        bool expect_mi;
 
        expect_mi = !!(cpu_if->vgic_hcr & GICH_HCR_UIE);
 
-       for (i = 0; i < nr_lr; i++) {
-               if (!(vcpu->arch.vgic_cpu.live_lrs & (1UL << i)))
-                               continue;
-
+       for (i = 0; i < used_lrs && !expect_mi; i++)
                expect_mi |= (!(cpu_if->vgic_lr[i] & GICH_LR_HW) &&
                              (cpu_if->vgic_lr[i] & GICH_LR_EOI));
-       }
 
        if (expect_mi) {
                cpu_if->vgic_misr = readl_relaxed(base + GICH_MISR);
 
                if (cpu_if->vgic_misr & GICH_MISR_EOI) {
                        eisr0  = readl_relaxed(base + GICH_EISR0);
-                       if (unlikely(nr_lr > 32))
+                       if (unlikely(used_lrs > 32))
                                eisr1  = readl_relaxed(base + GICH_EISR1);
                        else
                                eisr1 = 0;
@@ -87,13 +83,10 @@ static void __hyp_text save_elrsr(struct kvm_vcpu *vcpu, void __iomem *base)
 static void __hyp_text save_lrs(struct kvm_vcpu *vcpu, void __iomem *base)
 {
        struct vgic_v2_cpu_if *cpu_if = &vcpu->arch.vgic_cpu.vgic_v2;
-       int nr_lr = (kern_hyp_va(&kvm_vgic_global_state))->nr_lr;
        int i;
+       u64 used_lrs = vcpu->arch.vgic_cpu.used_lrs;
 
-       for (i = 0; i < nr_lr; i++) {
-               if (!(vcpu->arch.vgic_cpu.live_lrs & (1UL << i)))
-                       continue;
-
+       for (i = 0; i < used_lrs; i++) {
                if (cpu_if->vgic_elrsr & (1UL << i))
                        cpu_if->vgic_lr[i] &= ~GICH_LR_STATE;
                else
@@ -110,11 +103,12 @@ void __hyp_text __vgic_v2_save_state(struct kvm_vcpu *vcpu)
        struct vgic_v2_cpu_if *cpu_if = &vcpu->arch.vgic_cpu.vgic_v2;
        struct vgic_dist *vgic = &kvm->arch.vgic;
        void __iomem *base = kern_hyp_va(vgic->vctrl_base);
+       u64 used_lrs = vcpu->arch.vgic_cpu.used_lrs;
 
        if (!base)
                return;
 
-       if (vcpu->arch.vgic_cpu.live_lrs) {
+       if (used_lrs) {
                cpu_if->vgic_apr = readl_relaxed(base + GICH_APR);
 
                save_maint_int_state(vcpu, base);
@@ -122,8 +116,6 @@ void __hyp_text __vgic_v2_save_state(struct kvm_vcpu *vcpu)
                save_lrs(vcpu, base);
 
                writel_relaxed(0, base + GICH_HCR);
-
-               vcpu->arch.vgic_cpu.live_lrs = 0;
        } else {
                cpu_if->vgic_eisr = 0;
                cpu_if->vgic_elrsr = ~0UL;
@@ -139,31 +131,20 @@ void __hyp_text __vgic_v2_restore_state(struct kvm_vcpu *vcpu)
        struct vgic_v2_cpu_if *cpu_if = &vcpu->arch.vgic_cpu.vgic_v2;
        struct vgic_dist *vgic = &kvm->arch.vgic;
        void __iomem *base = kern_hyp_va(vgic->vctrl_base);
-       int nr_lr = (kern_hyp_va(&kvm_vgic_global_state))->nr_lr;
        int i;
-       u64 live_lrs = 0;
+       u64 used_lrs = vcpu->arch.vgic_cpu.used_lrs;
 
        if (!base)
                return;
 
-
-       for (i = 0; i < nr_lr; i++)
-               if (cpu_if->vgic_lr[i] & GICH_LR_STATE)
-                       live_lrs |= 1UL << i;
-
-       if (live_lrs) {
+       if (used_lrs) {
                writel_relaxed(cpu_if->vgic_hcr, base + GICH_HCR);
                writel_relaxed(cpu_if->vgic_apr, base + GICH_APR);
-               for (i = 0; i < nr_lr; i++) {
-                       if (!(live_lrs & (1UL << i)))
-                               continue;
-
+               for (i = 0; i < used_lrs; i++) {
                        writel_relaxed(cpu_if->vgic_lr[i],
                                       base + GICH_LR0 + (i * 4));
                }
        }
-
-       vcpu->arch.vgic_cpu.live_lrs = live_lrs;
 }
 
 #ifdef CONFIG_ARM64