samples: ftrace: Add RISC-V support for SAMPLE_FTRACE_DIRECT[_MULTI]

[linux-2.6-microblaze.git] / samples / ftrace / ftrace-direct-modify.c

diff --git a/samples/ftrace/ftrace-direct-modify.c b/samples/ftrace/ftrace-direct-modify.c
index e2a6a69..8122039 100644 (file)
--- a/samples/ftrace/ftrace-direct-modify.c
+++ b/samples/ftrace/ftrace-direct-modify.c
@@ -24,6 +24,41 @@ extern void my_tramp2(void *);
 
 static unsigned long my_ip = (unsigned long)schedule;
 
+#ifdef CONFIG_RISCV
+#include <asm/asm.h>
+
+asm (
+"      .pushsection    .text, \"ax\", @progbits\n"
+"      .type           my_tramp1, @function\n"
+"      .globl          my_tramp1\n"
+"   my_tramp1:\n"
+"      addi    sp,sp,-2*"SZREG"\n"
+"      "REG_S" t0,0*"SZREG"(sp)\n"
+"      "REG_S" ra,1*"SZREG"(sp)\n"
+"      call    my_direct_func1\n"
+"      "REG_L" t0,0*"SZREG"(sp)\n"
+"      "REG_L" ra,1*"SZREG"(sp)\n"
+"      addi    sp,sp,2*"SZREG"\n"
+"      jr      t0\n"
+"      .size           my_tramp1, .-my_tramp1\n"
+"      .type           my_tramp2, @function\n"
+"      .globl          my_tramp2\n"
+
+"   my_tramp2:\n"
+"      addi    sp,sp,-2*"SZREG"\n"
+"      "REG_S" t0,0*"SZREG"(sp)\n"
+"      "REG_S" ra,1*"SZREG"(sp)\n"
+"      call    my_direct_func2\n"
+"      "REG_L" t0,0*"SZREG"(sp)\n"
+"      "REG_L" ra,1*"SZREG"(sp)\n"
+"      addi    sp,sp,2*"SZREG"\n"
+"      jr      t0\n"
+"      .size           my_tramp2, .-my_tramp2\n"
+"      .popsection\n"
+);
+
+#endif /* CONFIG_RISCV */
+
 #ifdef CONFIG_X86_64
 
 #include <asm/ibt.h>