vdpa/mlx5: Support creating resources with uid == 0

[linux-2.6-microblaze.git] / include / linux / mlx5 / mlx5_ifc.h

diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h
index eb86e80..b0009aa 100644 (file)
--- a/include/linux/mlx5/mlx5_ifc.h
+++ b/include/linux/mlx5/mlx5_ifc.h
@@ -435,7 +435,10 @@ struct mlx5_ifc_flow_table_prop_layout_bits {
 
        u8         reserved_at_40[0x20];
 
-       u8         reserved_at_60[0x18];
+       u8         reserved_at_60[0x2];
+       u8         reformat_insert[0x1];
+       u8         reformat_remove[0x1];
+       u8         reserver_at_64[0x14];
        u8         log_max_ft_num[0x8];
 
        u8         reserved_at_80[0x10];
@@ -953,9 +956,9 @@ struct mlx5_ifc_per_protocol_networking_offload_caps_bits {
 };
 
 enum {
-       MLX5_QP_TIMESTAMP_FORMAT_CAP_FREE_RUNNING               = 0x0,
-       MLX5_QP_TIMESTAMP_FORMAT_CAP_REAL_TIME                  = 0x1,
-       MLX5_QP_TIMESTAMP_FORMAT_CAP_FREE_RUNNING_AND_REAL_TIME = 0x2,
+       MLX5_TIMESTAMP_FORMAT_CAP_FREE_RUNNING               = 0x0,
+       MLX5_TIMESTAMP_FORMAT_CAP_REAL_TIME                  = 0x1,
+       MLX5_TIMESTAMP_FORMAT_CAP_FREE_RUNNING_AND_REAL_TIME = 0x2,
 };
 
 struct mlx5_ifc_roce_cap_bits {
@@ -1296,23 +1299,12 @@ enum {
        MLX5_STEERING_FORMAT_CONNECTX_6DX = 1,
 };
 
-enum {
-       MLX5_SQ_TIMESTAMP_FORMAT_CAP_FREE_RUNNING               = 0x0,
-       MLX5_SQ_TIMESTAMP_FORMAT_CAP_REAL_TIME                  = 0x1,
-       MLX5_SQ_TIMESTAMP_FORMAT_CAP_FREE_RUNNING_AND_REAL_TIME = 0x2,
-};
-
-enum {
-       MLX5_RQ_TIMESTAMP_FORMAT_CAP_FREE_RUNNING               = 0x0,
-       MLX5_RQ_TIMESTAMP_FORMAT_CAP_REAL_TIME                  = 0x1,
-       MLX5_RQ_TIMESTAMP_FORMAT_CAP_FREE_RUNNING_AND_REAL_TIME = 0x2,
-};
-
 struct mlx5_ifc_cmd_hca_cap_bits {
        u8         reserved_at_0[0x1f];
        u8         vhca_resource_manager[0x1];
 
-       u8         reserved_at_20[0x3];
+       u8         hca_cap_2[0x1];
+       u8         reserved_at_21[0x2];
        u8         event_on_vhca_state_teardown_request[0x1];
        u8         event_on_vhca_state_in_use[0x1];
        u8         event_on_vhca_state_active[0x1];
@@ -1520,7 +1512,9 @@ struct mlx5_ifc_cmd_hca_cap_bits {
        u8         uar_4k[0x1];
        u8         reserved_at_241[0x9];
        u8         uar_sz[0x6];
-       u8         reserved_at_250[0x8];
+       u8         reserved_at_248[0x2];
+       u8         umem_uid_0[0x1];
+       u8         reserved_at_250[0x5];
        u8         log_pg_sz[0x8];
 
        u8         bf[0x1];
@@ -1732,6 +1726,17 @@ struct mlx5_ifc_cmd_hca_cap_bits {
        u8         reserved_at_7c0[0x40];
 };
 
+struct mlx5_ifc_cmd_hca_cap_2_bits {
+       u8         reserved_at_0[0xa0];
+
+       u8         max_reformat_insert_size[0x8];
+       u8         max_reformat_insert_offset[0x8];
+       u8         max_reformat_remove_size[0x8];
+       u8         max_reformat_remove_offset[0x8];
+
+       u8         reserved_at_c0[0x740];
+};
+
 enum mlx5_flow_destination_type {
        MLX5_FLOW_DESTINATION_TYPE_VPORT        = 0x0,
        MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE   = 0x1,
@@ -2944,9 +2949,9 @@ enum {
 };
 
 enum {
-       MLX5_QPC_TIMESTAMP_FORMAT_FREE_RUNNING = 0x0,
-       MLX5_QPC_TIMESTAMP_FORMAT_DEFAULT      = 0x1,
-       MLX5_QPC_TIMESTAMP_FORMAT_REAL_TIME    = 0x2,
+       MLX5_TIMESTAMP_FORMAT_FREE_RUNNING = 0x0,
+       MLX5_TIMESTAMP_FORMAT_DEFAULT      = 0x1,
+       MLX5_TIMESTAMP_FORMAT_REAL_TIME    = 0x2,
 };
 
 struct mlx5_ifc_qpc_bits {
@@ -3105,6 +3110,7 @@ struct mlx5_ifc_roce_addr_layout_bits {
 
 union mlx5_ifc_hca_cap_union_bits {
        struct mlx5_ifc_cmd_hca_cap_bits cmd_hca_cap;
+       struct mlx5_ifc_cmd_hca_cap_2_bits cmd_hca_cap_2;
        struct mlx5_ifc_odp_cap_bits odp_cap;
        struct mlx5_ifc_atomic_caps_bits atomic_caps;
        struct mlx5_ifc_roce_cap_bits roce_cap;
@@ -3396,12 +3402,6 @@ enum {
        MLX5_SQC_STATE_ERR  = 0x3,
 };
 
-enum {
-       MLX5_SQC_TIMESTAMP_FORMAT_FREE_RUNNING = 0x0,
-       MLX5_SQC_TIMESTAMP_FORMAT_DEFAULT      = 0x1,
-       MLX5_SQC_TIMESTAMP_FORMAT_REAL_TIME    = 0x2,
-};
-
 struct mlx5_ifc_sqc_bits {
        u8         rlky[0x1];
        u8         cd_master[0x1];
@@ -3507,12 +3507,6 @@ enum {
        MLX5_RQC_STATE_ERR  = 0x3,
 };
 
-enum {
-       MLX5_RQC_TIMESTAMP_FORMAT_FREE_RUNNING = 0x0,
-       MLX5_RQC_TIMESTAMP_FORMAT_DEFAULT      = 0x1,
-       MLX5_RQC_TIMESTAMP_FORMAT_REAL_TIME    = 0x2,
-};
-
 struct mlx5_ifc_rqc_bits {
        u8         rlky[0x1];
        u8         delay_drop_en[0x1];
@@ -3790,8 +3784,8 @@ struct mlx5_ifc_eqc_bits {
 
        u8         reserved_at_80[0x20];
 
-       u8         reserved_at_a0[0x18];
-       u8         intr[0x8];
+       u8         reserved_at_a0[0x14];
+       u8         intr[0xc];
 
        u8         reserved_at_c0[0x3];
        u8         log_page_size[0x5];
@@ -5785,12 +5779,14 @@ struct mlx5_ifc_query_eq_in_bits {
 };
 
 struct mlx5_ifc_packet_reformat_context_in_bits {
-       u8         reserved_at_0[0x5];
-       u8         reformat_type[0x3];
-       u8         reserved_at_8[0xe];
+       u8         reformat_type[0x8];
+       u8         reserved_at_8[0x4];
+       u8         reformat_param_0[0x4];
+       u8         reserved_at_10[0x6];
        u8         reformat_data_size[0xa];
 
-       u8         reserved_at_20[0x10];
+       u8         reformat_param_1[0x8];
+       u8         reserved_at_28[0x8];
        u8         reformat_data[2][0x8];
 
        u8         more_reformat_data[][0x8];
@@ -5830,12 +5826,20 @@ struct mlx5_ifc_alloc_packet_reformat_context_out_bits {
        u8         reserved_at_60[0x20];
 };
 
+enum {
+       MLX5_REFORMAT_CONTEXT_ANCHOR_MAC_START = 0x1,
+       MLX5_REFORMAT_CONTEXT_ANCHOR_IP_START = 0x7,
+       MLX5_REFORMAT_CONTEXT_ANCHOR_TCP_UDP_START = 0x9,
+};
+
 enum mlx5_reformat_ctx_type {
        MLX5_REFORMAT_TYPE_L2_TO_VXLAN = 0x0,
        MLX5_REFORMAT_TYPE_L2_TO_NVGRE = 0x1,
        MLX5_REFORMAT_TYPE_L2_TO_L2_TUNNEL = 0x2,
        MLX5_REFORMAT_TYPE_L3_TUNNEL_TO_L2 = 0x3,
        MLX5_REFORMAT_TYPE_L2_TO_L3_TUNNEL = 0x4,
+       MLX5_REFORMAT_TYPE_INSERT_HDR = 0xf,
+       MLX5_REFORMAT_TYPE_REMOVE_HDR = 0x10,
 };
 
 struct mlx5_ifc_alloc_packet_reformat_context_in_bits {
@@ -5956,6 +5960,8 @@ enum {
        MLX5_ACTION_IN_FIELD_OUT_TCP_SEQ_NUM   = 0x59,
        MLX5_ACTION_IN_FIELD_OUT_TCP_ACK_NUM   = 0x5B,
        MLX5_ACTION_IN_FIELD_IPSEC_SYNDROME    = 0x5D,
+       MLX5_ACTION_IN_FIELD_OUT_EMD_47_32     = 0x6F,
+       MLX5_ACTION_IN_FIELD_OUT_EMD_31_0      = 0x70,
 };
 
 struct mlx5_ifc_alloc_modify_header_context_out_bits {
@@ -11055,6 +11061,11 @@ struct mlx5_ifc_create_sampler_obj_in_bits {
        struct mlx5_ifc_sampler_obj_bits sampler_object;
 };
 
+struct mlx5_ifc_query_sampler_obj_out_bits {
+       struct mlx5_ifc_general_obj_out_cmd_hdr_bits general_obj_out_cmd_hdr;
+       struct mlx5_ifc_sampler_obj_bits sampler_object;
+};
+
 enum {
        MLX5_GENERAL_OBJECT_TYPE_ENCRYPTION_KEY_KEY_SIZE_128 = 0x0,
        MLX5_GENERAL_OBJECT_TYPE_ENCRYPTION_KEY_KEY_SIZE_256 = 0x1,