Merge tag 'net-next-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev...
[linux-2.6-microblaze.git] / include / linux / mlx5 / mlx5_ifc.h
index 91b7f73..7d2d0ba 100644 (file)
@@ -120,6 +120,11 @@ enum {
        MLX5_CMD_OP_QUERY_SF_PARTITION            = 0x111,
        MLX5_CMD_OP_ALLOC_SF                      = 0x113,
        MLX5_CMD_OP_DEALLOC_SF                    = 0x114,
+       MLX5_CMD_OP_SUSPEND_VHCA                  = 0x115,
+       MLX5_CMD_OP_RESUME_VHCA                   = 0x116,
+       MLX5_CMD_OP_QUERY_VHCA_MIGRATION_STATE    = 0x117,
+       MLX5_CMD_OP_SAVE_VHCA_STATE               = 0x118,
+       MLX5_CMD_OP_LOAD_VHCA_STATE               = 0x119,
        MLX5_CMD_OP_CREATE_MKEY                   = 0x200,
        MLX5_CMD_OP_QUERY_MKEY                    = 0x201,
        MLX5_CMD_OP_DESTROY_MKEY                  = 0x202,
@@ -1755,7 +1760,9 @@ struct mlx5_ifc_cmd_hca_cap_bits {
        u8         reserved_at_682[0x1];
        u8         log_max_sf[0x5];
        u8         apu[0x1];
-       u8         reserved_at_689[0x7];
+       u8         reserved_at_689[0x4];
+       u8         migration[0x1];
+       u8         reserved_at_68e[0x2];
        u8         log_min_sf_size[0x8];
        u8         max_num_sf_partitions[0x8];
 
@@ -11528,4 +11535,142 @@ enum {
        MLX5_MTT_PERM_RW        = MLX5_MTT_PERM_READ | MLX5_MTT_PERM_WRITE,
 };
 
+enum {
+       MLX5_SUSPEND_VHCA_IN_OP_MOD_SUSPEND_INITIATOR  = 0x0,
+       MLX5_SUSPEND_VHCA_IN_OP_MOD_SUSPEND_RESPONDER  = 0x1,
+};
+
+struct mlx5_ifc_suspend_vhca_in_bits {
+       u8         opcode[0x10];
+       u8         uid[0x10];
+
+       u8         reserved_at_20[0x10];
+       u8         op_mod[0x10];
+
+       u8         reserved_at_40[0x10];
+       u8         vhca_id[0x10];
+
+       u8         reserved_at_60[0x20];
+};
+
+struct mlx5_ifc_suspend_vhca_out_bits {
+       u8         status[0x8];
+       u8         reserved_at_8[0x18];
+
+       u8         syndrome[0x20];
+
+       u8         reserved_at_40[0x40];
+};
+
+enum {
+       MLX5_RESUME_VHCA_IN_OP_MOD_RESUME_RESPONDER  = 0x0,
+       MLX5_RESUME_VHCA_IN_OP_MOD_RESUME_INITIATOR  = 0x1,
+};
+
+struct mlx5_ifc_resume_vhca_in_bits {
+       u8         opcode[0x10];
+       u8         uid[0x10];
+
+       u8         reserved_at_20[0x10];
+       u8         op_mod[0x10];
+
+       u8         reserved_at_40[0x10];
+       u8         vhca_id[0x10];
+
+       u8         reserved_at_60[0x20];
+};
+
+struct mlx5_ifc_resume_vhca_out_bits {
+       u8         status[0x8];
+       u8         reserved_at_8[0x18];
+
+       u8         syndrome[0x20];
+
+       u8         reserved_at_40[0x40];
+};
+
+struct mlx5_ifc_query_vhca_migration_state_in_bits {
+       u8         opcode[0x10];
+       u8         uid[0x10];
+
+       u8         reserved_at_20[0x10];
+       u8         op_mod[0x10];
+
+       u8         reserved_at_40[0x10];
+       u8         vhca_id[0x10];
+
+       u8         reserved_at_60[0x20];
+};
+
+struct mlx5_ifc_query_vhca_migration_state_out_bits {
+       u8         status[0x8];
+       u8         reserved_at_8[0x18];
+
+       u8         syndrome[0x20];
+
+       u8         reserved_at_40[0x40];
+
+       u8         required_umem_size[0x20];
+
+       u8         reserved_at_a0[0x160];
+};
+
+struct mlx5_ifc_save_vhca_state_in_bits {
+       u8         opcode[0x10];
+       u8         uid[0x10];
+
+       u8         reserved_at_20[0x10];
+       u8         op_mod[0x10];
+
+       u8         reserved_at_40[0x10];
+       u8         vhca_id[0x10];
+
+       u8         reserved_at_60[0x20];
+
+       u8         va[0x40];
+
+       u8         mkey[0x20];
+
+       u8         size[0x20];
+};
+
+struct mlx5_ifc_save_vhca_state_out_bits {
+       u8         status[0x8];
+       u8         reserved_at_8[0x18];
+
+       u8         syndrome[0x20];
+
+       u8         actual_image_size[0x20];
+
+       u8         reserved_at_60[0x20];
+};
+
+struct mlx5_ifc_load_vhca_state_in_bits {
+       u8         opcode[0x10];
+       u8         uid[0x10];
+
+       u8         reserved_at_20[0x10];
+       u8         op_mod[0x10];
+
+       u8         reserved_at_40[0x10];
+       u8         vhca_id[0x10];
+
+       u8         reserved_at_60[0x20];
+
+       u8         va[0x40];
+
+       u8         mkey[0x20];
+
+       u8         size[0x20];
+};
+
+struct mlx5_ifc_load_vhca_state_out_bits {
+       u8         status[0x8];
+       u8         reserved_at_8[0x18];
+
+       u8         syndrome[0x20];
+
+       u8         reserved_at_40[0x40];
+};
+
 #endif /* MLX5_IFC_H */