Merge branch 'next' into for-linus

[linux-2.6-microblaze.git] / include / linux / mfd / ti-lmu-register.h

diff --git a/include/linux/mfd/ti-lmu-register.h b/include/linux/mfd/ti-lmu-register.h
index 222cb14..116a749 100644 (file)
--- a/include/linux/mfd/ti-lmu-register.h
+++ b/include/linux/mfd/ti-lmu-register.h
@@ -187,47 +187,26 @@
 
 #define LM3695_MAX_REG                         0x14
 
-/* LM3697 */
-#define LM3697_REG_HVLED_OUTPUT_CFG            0x10
-#define LM3697_HVLED1_CFG_MASK                 BIT(0)
-#define LM3697_HVLED2_CFG_MASK                 BIT(1)
-#define LM3697_HVLED3_CFG_MASK                 BIT(2)
-#define LM3697_HVLED1_CFG_SHIFT                        0
-#define LM3697_HVLED2_CFG_SHIFT                        1
-#define LM3697_HVLED3_CFG_SHIFT                        2
+/* LM36274 */
+#define LM36274_REG_REV                                0x01
+#define LM36274_REG_BL_CFG_1                   0x02
+#define LM36274_REG_BL_CFG_2                   0x03
+#define LM36274_REG_BRT_LSB                    0x04
+#define LM36274_REG_BRT_MSB                    0x05
+#define LM36274_REG_BL_EN                      0x08
+
+#define LM36274_REG_BIAS_CONFIG_1              0x09
+#define LM36274_EXT_EN_MASK                    BIT(0)
+#define LM36274_EN_VNEG_MASK                   BIT(1)
+#define LM36274_EN_VPOS_MASK                   BIT(2)
+
+#define LM36274_REG_BIAS_CONFIG_2              0x0a
+#define LM36274_REG_BIAS_CONFIG_3              0x0b
+#define LM36274_REG_VOUT_BOOST                 0x0c
+#define LM36274_REG_VOUT_POS                   0x0d
+#define LM36274_REG_VOUT_NEG                   0x0e
+#define LM36274_VOUT_MASK                      0x3F
+
+#define LM36274_MAX_REG                                0x13
 
-#define LM3697_REG_BL0_RAMP                    0x11
-#define LM3697_REG_BL1_RAMP                    0x12
-#define LM3697_RAMPUP_MASK                     0xF0
-#define LM3697_RAMPUP_SHIFT                    4
-#define LM3697_RAMPDN_MASK                     0x0F
-#define LM3697_RAMPDN_SHIFT                    0
-
-#define LM3697_REG_RAMP_CONF                   0x14
-#define LM3697_RAMP_MASK                       0x0F
-#define LM3697_RAMP_EACH                       0x05
-
-#define LM3697_REG_PWM_CFG                     0x1C
-#define LM3697_PWM_A_MASK                      BIT(0)
-#define LM3697_PWM_B_MASK                      BIT(1)
-
-#define LM3697_REG_IMAX_A                      0x17
-#define LM3697_REG_IMAX_B                      0x18
-
-#define LM3697_REG_FEEDBACK_ENABLE             0x19
-
-#define LM3697_REG_BRT_A_LSB                   0x20
-#define LM3697_REG_BRT_A_MSB                   0x21
-#define LM3697_REG_BRT_B_LSB                   0x22
-#define LM3697_REG_BRT_B_MSB                   0x23
-
-#define LM3697_REG_ENABLE                      0x24
-
-#define LM3697_REG_OPEN_FAULT_STATUS           0xB0
-
-#define LM3697_REG_SHORT_FAULT_STATUS          0xB2
-
-#define LM3697_REG_MONITOR_ENABLE              0xB4
-
-#define LM3697_MAX_REG                         0xB4
 #endif