Merge tag 'for-linus-5.12b-rc1-tag' of git://git.kernel.org/pub/scm/linux/kernel...

[linux-2.6-microblaze.git] / include / linux / io-pgtable.h

diff --git a/include/linux/io-pgtable.h b/include/linux/io-pgtable.h
index ea727eb..a4c9ca2 100644 (file)
--- a/include/linux/io-pgtable.h
+++ b/include/linux/io-pgtable.h
@@ -15,6 +15,7 @@ enum io_pgtable_fmt {
        ARM_64_LPAE_S2,
        ARM_V7S,
        ARM_MALI_LPAE,
+       AMD_IOMMU_V1,
        IO_PGTABLE_NUM_FMTS,
 };
 
@@ -68,13 +69,9 @@ struct io_pgtable_cfg {
         *      hardware which does not implement the permissions of a given
         *      format, and/or requires some format-specific default value.
         *
-        * IO_PGTABLE_QUIRK_TLBI_ON_MAP: If the format forbids caching invalid
-        *      (unmapped) entries but the hardware might do so anyway, perform
-        *      TLB maintenance when mapping as well as when unmapping.
-        *
         * IO_PGTABLE_QUIRK_ARM_MTK_EXT: (ARM v7s format) MediaTek IOMMUs extend
-        *      to support up to 34 bits PA where the bit32 and bit33 are
-        *      encoded in the bit9 and bit4 of the PTE respectively.
+        *      to support up to 35 bits PA where the bit32, bit33 and bit34 are
+        *      encoded in the bit9, bit4 and bit5 of the PTE respectively.
         *
         * IO_PGTABLE_QUIRK_NON_STRICT: Skip issuing synchronous leaf TLBIs
         *      on unmap, for DMA domains using the flush queue mechanism for
@@ -88,7 +85,6 @@ struct io_pgtable_cfg {
         */
        #define IO_PGTABLE_QUIRK_ARM_NS         BIT(0)
        #define IO_PGTABLE_QUIRK_NO_PERMS       BIT(1)
-       #define IO_PGTABLE_QUIRK_TLBI_ON_MAP    BIT(2)
        #define IO_PGTABLE_QUIRK_ARM_MTK_EXT    BIT(3)
        #define IO_PGTABLE_QUIRK_NON_STRICT     BIT(4)
        #define IO_PGTABLE_QUIRK_ARM_TTBR1      BIT(5)
@@ -214,14 +210,16 @@ struct io_pgtable_domain_attr {
 
 static inline void io_pgtable_tlb_flush_all(struct io_pgtable *iop)
 {
-       iop->cfg.tlb->tlb_flush_all(iop->cookie);
+       if (iop->cfg.tlb && iop->cfg.tlb->tlb_flush_all)
+               iop->cfg.tlb->tlb_flush_all(iop->cookie);
 }
 
 static inline void
 io_pgtable_tlb_flush_walk(struct io_pgtable *iop, unsigned long iova,
                          size_t size, size_t granule)
 {
-       iop->cfg.tlb->tlb_flush_walk(iova, size, granule, iop->cookie);
+       if (iop->cfg.tlb && iop->cfg.tlb->tlb_flush_walk)
+               iop->cfg.tlb->tlb_flush_walk(iova, size, granule, iop->cookie);
 }
 
 static inline void
@@ -229,7 +227,7 @@ io_pgtable_tlb_add_page(struct io_pgtable *iop,
                        struct iommu_iotlb_gather * gather, unsigned long iova,
                        size_t granule)
 {
-       if (iop->cfg.tlb->tlb_add_page)
+       if (iop->cfg.tlb && iop->cfg.tlb->tlb_add_page)
                iop->cfg.tlb->tlb_add_page(gather, iova, granule, iop->cookie);
 }
 
@@ -251,5 +249,6 @@ extern struct io_pgtable_init_fns io_pgtable_arm_64_lpae_s1_init_fns;
 extern struct io_pgtable_init_fns io_pgtable_arm_64_lpae_s2_init_fns;
 extern struct io_pgtable_init_fns io_pgtable_arm_v7s_init_fns;
 extern struct io_pgtable_init_fns io_pgtable_arm_mali_lpae_init_fns;
+extern struct io_pgtable_init_fns io_pgtable_amd_iommu_v1_init_fns;
 
 #endif /* __IO_PGTABLE_H */