usb: dwc2: Set lpm mode parameters depend on HW configuration
[linux-2.6-microblaze.git] / drivers / usb / dwc2 / platform.c
index c0b64d4..d10a7f8 100644 (file)
@@ -230,9 +230,6 @@ static int dwc2_lowlevel_hw_init(struct dwc2_hsotg *hsotg)
 
        reset_control_deassert(hsotg->reset_ecc);
 
-       /* Set default UTMI width */
-       hsotg->phyif = GUSBCFG_PHYIF16;
-
        /*
         * Attempt to find a generic PHY, then look for an old style
         * USB PHY and then fall back to pdata
@@ -280,14 +277,14 @@ static int dwc2_lowlevel_hw_init(struct dwc2_hsotg *hsotg)
                 * width is 8-bit and set the phyif appropriately.
                 */
                if (phy_get_bus_width(hsotg->phy) == 8)
-                       hsotg->phyif = GUSBCFG_PHYIF8;
+                       hsotg->params.phy_utmi_width = 8;
        }
 
        /* Clock */
-       hsotg->clk = devm_clk_get(hsotg->dev, "otg");
+       hsotg->clk = devm_clk_get_optional(hsotg->dev, "otg");
        if (IS_ERR(hsotg->clk)) {
-               hsotg->clk = NULL;
-               dev_dbg(hsotg->dev, "cannot get otg clock\n");
+               dev_err(hsotg->dev, "cannot get otg clock\n");
+               return PTR_ERR(hsotg->clk);
        }
 
        /* Regulators */
@@ -481,6 +478,15 @@ static int dwc2_driver_probe(struct platform_device *dev)
                hsotg->gadget_enabled = 1;
        }
 
+       hsotg->reset_phy_on_wake =
+               of_property_read_bool(dev->dev.of_node,
+                                     "snps,reset-phy-on-wake");
+       if (hsotg->reset_phy_on_wake && !hsotg->phy) {
+               dev_warn(hsotg->dev,
+                        "Quirk reset-phy-on-wake only supports generic PHYs\n");
+               hsotg->reset_phy_on_wake = false;
+       }
+
        if (hsotg->dr_mode != USB_DR_MODE_PERIPHERAL) {
                retval = dwc2_hcd_init(hsotg);
                if (retval) {