(P80211DID_MKSECTION(5) | \
P80211DID_MKGROUP(11) | \
P80211DID_MKITEM(1) | 0x00000000)
-#define DIDmsg_p2req_ramdl_state_exeaddr \
+#define DIDMSG_P2REQ_RAMDL_STATE_EXEADDR \
(P80211DID_MKSECTION(5) | \
P80211DID_MKGROUP(11) | \
P80211DID_MKITEM(2) | 0x00000000)
-#define DIDmsg_p2req_ramdl_state_resultcode \
+#define DIDMSG_P2REQ_RAMDL_STATE_RESULTCODE \
(P80211DID_MKSECTION(5) | \
P80211DID_MKGROUP(11) | \
P80211DID_MKITEM(3) | 0x00000000)
-#define DIDmsg_p2req_ramdl_write \
+#define DIDMSG_P2REQ_RAMDL_WRITE \
(P80211DID_MKSECTION(5) | \
P80211DID_MKGROUP(12))
-#define DIDmsg_p2req_ramdl_write_addr \
+#define DIDMSG_P2REQ_RAMDL_WRITE_ADDR \
(P80211DID_MKSECTION(5) | \
P80211DID_MKGROUP(12) | \
P80211DID_MKITEM(1) | 0x00000000)
-#define DIDmsg_p2req_ramdl_write_len \
+#define DIDMSG_P2REQ_RAMDL_WRITE_LEN \
(P80211DID_MKSECTION(5) | \
P80211DID_MKGROUP(12) | \
P80211DID_MKITEM(2) | 0x00000000)
-#define DIDmsg_p2req_ramdl_write_data \
+#define DIDMSG_P2REQ_RAMDL_WRITE_DATA \
(P80211DID_MKSECTION(5) | \
P80211DID_MKGROUP(12) | \
P80211DID_MKITEM(3) | 0x00000000)
-#define DIDmsg_p2req_ramdl_write_resultcode \
+#define DIDMSG_P2REQ_RAMDL_WRITE_RESULTCODE \
(P80211DID_MKSECTION(5) | \
P80211DID_MKGROUP(12) | \
P80211DID_MKITEM(4) | 0x00000000)
-#define DIDmsg_p2req_flashdl_state \
+#define DIDMSG_P2REQ_FLASHDL_STATE \
(P80211DID_MKSECTION(5) | \
P80211DID_MKGROUP(13))
-#define DIDmsg_p2req_flashdl_write \
+#define DIDMSG_P2REQ_FLASHDL_WRITE \
(P80211DID_MKSECTION(5) | \
P80211DID_MKGROUP(14))
#define DIDmib_cat_dot11smt \