Merge tag 'linux-kselftest-4.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel...

[linux-2.6-microblaze.git] / drivers / spi / spi-sun4i.c

diff --git a/drivers/spi/spi-sun4i.c b/drivers/spi/spi-sun4i.c
index fbb0a4d..1ddd9e2 100644 (file)
--- a/drivers/spi/spi-sun4i.c
+++ b/drivers/spi/spi-sun4i.c
@@ -140,6 +140,9 @@ static void sun4i_spi_set_cs(struct spi_device *spi, bool enable)
        reg &= ~SUN4I_CTL_CS_MASK;
        reg |= SUN4I_CTL_CS(spi->chip_select);
 
+       /* We want to control the chip select manually */
+       reg |= SUN4I_CTL_CS_MANUAL;
+
        if (enable)
                reg |= SUN4I_CTL_CS_LEVEL;
        else
@@ -222,15 +225,12 @@ static int sun4i_spi_transfer_one(struct spi_master *master,
        else
                reg |= SUN4I_CTL_DHB;
 
-       /* We want to control the chip select manually */
-       reg |= SUN4I_CTL_CS_MANUAL;
-
        sun4i_spi_write(sspi, SUN4I_CTL_REG, reg);
 
        /* Ensure that we have a parent clock fast enough */
        mclk_rate = clk_get_rate(sspi->mclk);
-       if (mclk_rate < (2 * spi->max_speed_hz)) {
-               clk_set_rate(sspi->mclk, 2 * spi->max_speed_hz);
+       if (mclk_rate < (2 * tfr->speed_hz)) {
+               clk_set_rate(sspi->mclk, 2 * tfr->speed_hz);
                mclk_rate = clk_get_rate(sspi->mclk);
        }
 
@@ -248,14 +248,14 @@ static int sun4i_spi_transfer_one(struct spi_master *master,
         * First try CDR2, and if we can't reach the expected
         * frequency, fall back to CDR1.
         */
-       div = mclk_rate / (2 * spi->max_speed_hz);
+       div = mclk_rate / (2 * tfr->speed_hz);
        if (div <= (SUN4I_CLK_CTL_CDR2_MASK + 1)) {
                if (div > 0)
                        div--;
 
                reg = SUN4I_CLK_CTL_CDR2(div) | SUN4I_CLK_CTL_DRS;
        } else {
-               div = ilog2(mclk_rate) - ilog2(spi->max_speed_hz);
+               div = ilog2(mclk_rate) - ilog2(tfr->speed_hz);
                reg = SUN4I_CLK_CTL_CDR1(div);
        }