Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net

[linux-2.6-microblaze.git] / drivers / rtc / rtc-xgene.c

diff --git a/drivers/rtc/rtc-xgene.c b/drivers/rtc/rtc-xgene.c
index 1538208..9888383 100644 (file)
--- a/drivers/rtc/rtc-xgene.c
+++ b/drivers/rtc/rtc-xgene.c
@@ -1,34 +1,21 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * APM X-Gene SoC Real Time Clock Driver
  *
  * Copyright (c) 2014, Applied Micro Circuits Corporation
  * Author: Rameshwar Prasad Sahu <rsahu@apm.com>
  *         Loc Ho <lho@apm.com>
- *
- * This program is free software; you can redistribute  it and/or modify it
- * under  the terms of  the GNU General  Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
- * option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- *
  */
 
+#include <linux/clk.h>
+#include <linux/delay.h>
 #include <linux/init.h>
+#include <linux/io.h>
 #include <linux/module.h>
 #include <linux/of.h>
 #include <linux/platform_device.h>
-#include <linux/io.h>
-#include <linux/slab.h>
-#include <linux/clk.h>
-#include <linux/delay.h>
 #include <linux/rtc.h>
+#include <linux/slab.h>
 
 /* RTC CSR Registers */
 #define RTC_CCVR               0x00
@@ -48,7 +35,6 @@
 struct xgene_rtc_dev {
        struct rtc_device *rtc;
        struct device *dev;
-       unsigned long alarm_time;
        void __iomem *csr_base;
        struct clk *clk;
        unsigned int irq_wake;
@@ -59,11 +45,11 @@ static int xgene_rtc_read_time(struct device *dev, struct rtc_time *tm)
 {
        struct xgene_rtc_dev *pdata = dev_get_drvdata(dev);
 
-       rtc_time_to_tm(readl(pdata->csr_base + RTC_CCVR), tm);
+       rtc_time64_to_tm(readl(pdata->csr_base + RTC_CCVR), tm);
        return 0;
 }
 
-static int xgene_rtc_set_mmss(struct device *dev, unsigned long secs)
+static int xgene_rtc_set_time(struct device *dev, struct rtc_time *tm)
 {
        struct xgene_rtc_dev *pdata = dev_get_drvdata(dev);
 
@@ -71,7 +57,7 @@ static int xgene_rtc_set_mmss(struct device *dev, unsigned long secs)
         * NOTE: After the following write, the RTC_CCVR is only reflected
         *       after the update cycle of 1 seconds.
         */
-       writel((u32) secs, pdata->csr_base + RTC_CLR);
+       writel((u32)rtc_tm_to_time64(tm), pdata->csr_base + RTC_CLR);
        readl(pdata->csr_base + RTC_CLR); /* Force a barrier */
 
        return 0;
@@ -81,7 +67,8 @@ static int xgene_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
 {
        struct xgene_rtc_dev *pdata = dev_get_drvdata(dev);
 
-       rtc_time_to_tm(pdata->alarm_time, &alrm->time);
+       /* If possible, CMR should be read here */
+       rtc_time64_to_tm(0, &alrm->time);
        alrm->enabled = readl(pdata->csr_base + RTC_CCR) & RTC_CCR_IE;
 
        return 0;
@@ -115,11 +102,8 @@ static int xgene_rtc_alarm_irq_enabled(struct device *dev)
 static int xgene_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
 {
        struct xgene_rtc_dev *pdata = dev_get_drvdata(dev);
-       unsigned long alarm_time;
 
-       rtc_tm_to_time(&alrm->time, &alarm_time);
-       pdata->alarm_time = alarm_time;
-       writel((u32) pdata->alarm_time, pdata->csr_base + RTC_CMR);
+       writel((u32)rtc_tm_to_time64(&alrm->time), pdata->csr_base + RTC_CMR);
 
        xgene_rtc_alarm_irq_enable(dev, alrm->enabled);
 
@@ -128,7 +112,7 @@ static int xgene_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
 
 static const struct rtc_class_ops xgene_rtc_ops = {
        .read_time      = xgene_rtc_read_time,
-       .set_mmss       = xgene_rtc_set_mmss,
+       .set_time       = xgene_rtc_set_time,
        .read_alarm     = xgene_rtc_read_alarm,
        .set_alarm      = xgene_rtc_set_alarm,
        .alarm_irq_enable = xgene_rtc_alarm_irq_enable,
@@ -136,7 +120,7 @@ static const struct rtc_class_ops xgene_rtc_ops = {
 
 static irqreturn_t xgene_rtc_interrupt(int irq, void *id)
 {
-       struct xgene_rtc_dev *pdata = (struct xgene_rtc_dev *) id;
+       struct xgene_rtc_dev *pdata = id;
 
        /* Check if interrupt asserted */
        if (!(readl(pdata->csr_base + RTC_STAT) & RTC_STAT_BIT))
@@ -168,6 +152,10 @@ static int xgene_rtc_probe(struct platform_device *pdev)
        if (IS_ERR(pdata->csr_base))
                return PTR_ERR(pdata->csr_base);
 
+       pdata->rtc = devm_rtc_allocate_device(&pdev->dev);
+       if (IS_ERR(pdata->rtc))
+               return PTR_ERR(pdata->rtc);
+
        irq = platform_get_irq(pdev, 0);
        if (irq < 0) {
                dev_err(&pdev->dev, "No IRQ resource\n");
@@ -198,15 +186,16 @@ static int xgene_rtc_probe(struct platform_device *pdev)
                return ret;
        }
 
-       pdata->rtc = devm_rtc_device_register(&pdev->dev, pdev->name,
-                                        &xgene_rtc_ops, THIS_MODULE);
-       if (IS_ERR(pdata->rtc)) {
-               clk_disable_unprepare(pdata->clk);
-               return PTR_ERR(pdata->rtc);
-       }
-
        /* HW does not support update faster than 1 seconds */
        pdata->rtc->uie_unsupported = 1;
+       pdata->rtc->ops = &xgene_rtc_ops;
+       pdata->rtc->range_max = U32_MAX;
+
+       ret = rtc_register_device(pdata->rtc);
+       if (ret) {
+               clk_disable_unprepare(pdata->clk);
+               return ret;
+       }
 
        return 0;
 }