#define AXI_HALTREQ_REG 0x0
#define AXI_HALTACK_REG 0x4
#define AXI_IDLE_REG 0x8
-#define NAV_AXI_HALTREQ_BIT BIT(0)
-#define NAV_AXI_HALTACK_BIT BIT(1)
-#define NAV_AXI_IDLE_BIT BIT(2)
#define AXI_GATING_VALID_OVERRIDE BIT(0)
#define HALT_ACK_TIMEOUT_US 100000
-#define NAV_HALT_ACK_TIMEOUT_US 200
/* QDSP6SS_RESET */
#define Q6SS_STOP_CORE BIT(0)
int version;
bool need_mem_protection;
bool has_alt_reset;
- bool has_halt_nav;
+ bool has_spare_reg;
};
struct q6v5 {
void __iomem *rmb_base;
struct regmap *halt_map;
- struct regmap *halt_nav_map;
struct regmap *conn_map;
u32 halt_q6;
u32 halt_modem;
u32 halt_nc;
- u32 halt_nav;
u32 conn_box;
struct reset_control *mss_restart;
phys_addr_t mpss_phys;
phys_addr_t mpss_reloc;
- void *mpss_region;
size_t mpss_size;
struct qcom_rproc_glink glink_subdev;
struct qcom_sysmon *sysmon;
bool need_mem_protection;
bool has_alt_reset;
- bool has_halt_nav;
+ bool has_spare_reg;
int mpss_perm;
int mba_perm;
const char *hexagon_mdt_image;
}
return ret;
-};
+}
static void q6v5_pds_disable(struct q6v5 *qproc, struct device **pds,
size_t pd_count)
reset_control_assert(qproc->pdc_reset);
ret = reset_control_reset(qproc->mss_restart);
reset_control_deassert(qproc->pdc_reset);
- } else if (qproc->has_halt_nav) {
+ } else if (qproc->has_spare_reg) {
/*
* When the AXI pipeline is being reset with the Q6 modem partly
* operational there is possibility of AXI valid signal to
* glitch, leading to spurious transactions and Q6 hangs. A work
* around is employed by asserting the AXI_GATING_VALID_OVERRIDE
- * BIT before triggering Q6 MSS reset. Both the HALTREQ and
- * AXI_GATING_VALID_OVERRIDE are withdrawn post MSS assert
- * followed by a MSS deassert, while holding the PDC reset.
+ * BIT before triggering Q6 MSS reset. AXI_GATING_VALID_OVERRIDE
+ * is withdrawn post MSS assert followed by a MSS deassert,
+ * while holding the PDC reset.
*/
reset_control_assert(qproc->pdc_reset);
regmap_update_bits(qproc->conn_map, qproc->conn_box,
AXI_GATING_VALID_OVERRIDE, 1);
- regmap_update_bits(qproc->halt_nav_map, qproc->halt_nav,
- NAV_AXI_HALTREQ_BIT, 0);
reset_control_assert(qproc->mss_restart);
reset_control_deassert(qproc->pdc_reset);
regmap_update_bits(qproc->conn_map, qproc->conn_box,
ret = reset_control_reset(qproc->mss_restart);
writel(0, qproc->rmb_base + RMB_MBA_ALT_RESET);
reset_control_deassert(qproc->pdc_reset);
- } else if (qproc->has_halt_nav) {
+ } else if (qproc->has_spare_reg) {
ret = reset_control_reset(qproc->mss_restart);
} else {
ret = reset_control_deassert(qproc->mss_restart);
regmap_write(halt_map, offset + AXI_HALTREQ_REG, 0);
}
-static void q6v5proc_halt_nav_axi_port(struct q6v5 *qproc,
- struct regmap *halt_map,
- u32 offset)
-{
- unsigned int val;
- int ret;
-
- /* Check if we're already idle */
- ret = regmap_read(halt_map, offset, &val);
- if (!ret && (val & NAV_AXI_IDLE_BIT))
- return;
-
- /* Assert halt request */
- regmap_update_bits(halt_map, offset, NAV_AXI_HALTREQ_BIT,
- NAV_AXI_HALTREQ_BIT);
-
- /* Wait for halt ack*/
- regmap_read_poll_timeout(halt_map, offset, val,
- (val & NAV_AXI_HALTACK_BIT),
- 5, NAV_HALT_ACK_TIMEOUT_US);
-
- ret = regmap_read(halt_map, offset, &val);
- if (ret || !(val & NAV_AXI_IDLE_BIT))
- dev_err(qproc->dev, "port failed halt\n");
-}
-
static int q6v5_mpss_init_image(struct q6v5 *qproc, const struct firmware *fw)
{
unsigned long dma_attrs = DMA_ATTR_FORCE_CONTIGUOUS;
halt_axi_ports:
q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_q6);
q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_modem);
- if (qproc->has_halt_nav)
- q6v5proc_halt_nav_axi_port(qproc, qproc->halt_nav_map,
- qproc->halt_nav);
q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_nc);
reclaim_mba:
q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_q6);
q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_modem);
- if (qproc->has_halt_nav)
- q6v5proc_halt_nav_axi_port(qproc, qproc->halt_nav_map,
- qproc->halt_nav);
q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_nc);
if (qproc->version == MSS_MSM8996) {
/*
goto release_firmware;
}
- ptr = qproc->mpss_region + offset;
+ ptr = ioremap_wc(qproc->mpss_phys + offset, phdr->p_memsz);
+ if (!ptr) {
+ dev_err(qproc->dev,
+ "unable to map memory region: %pa+%zx-%x\n",
+ &qproc->mpss_phys, offset, phdr->p_memsz);
+ goto release_firmware;
+ }
if (phdr->p_filesz && phdr->p_offset < fw->size) {
/* Firmware is large enough to be non-split */
"failed to load segment %d from truncated file %s\n",
i, fw_name);
ret = -EINVAL;
+ iounmap(ptr);
goto release_firmware;
}
ret = request_firmware(&seg_fw, fw_name, qproc->dev);
if (ret) {
dev_err(qproc->dev, "failed to load %s\n", fw_name);
+ iounmap(ptr);
goto release_firmware;
}
memset(ptr + phdr->p_filesz, 0,
phdr->p_memsz - phdr->p_filesz);
}
+ iounmap(ptr);
size += phdr->p_memsz;
code_length = readl(qproc->rmb_base + RMB_PMI_CODE_LENGTH_REG);
int ret = 0;
struct q6v5 *qproc = rproc->priv;
unsigned long mask = BIT((unsigned long)segment->priv);
- void *ptr = rproc_da_to_va(rproc, segment->da, segment->size);
+ int offset = segment->da - qproc->mpss_reloc;
+ void *ptr = NULL;
/* Unlock mba before copying segments */
if (!qproc->dump_mba_loaded) {
}
}
- if (!ptr || ret)
- memset(dest, 0xff, segment->size);
- else
+ if (!ret)
+ ptr = ioremap_wc(qproc->mpss_phys + offset, segment->size);
+
+ if (ptr) {
memcpy(dest, ptr, segment->size);
+ iounmap(ptr);
+ } else {
+ memset(dest, 0xff, segment->size);
+ }
qproc->dump_segment_mask |= mask;
return 0;
}
-static void *q6v5_da_to_va(struct rproc *rproc, u64 da, size_t len)
-{
- struct q6v5 *qproc = rproc->priv;
- int offset;
-
- offset = da - qproc->mpss_reloc;
- if (offset < 0 || offset + len > qproc->mpss_size)
- return NULL;
-
- return qproc->mpss_region + offset;
-}
-
static int qcom_q6v5_register_dump_segments(struct rproc *rproc,
const struct firmware *mba_fw)
{
return ret;
}
+ rproc_coredump_set_elf_info(rproc, ELFCLASS32, EM_NONE);
+
ehdr = (struct elf32_hdr *)fw->data;
phdrs = (struct elf32_phdr *)(ehdr + 1);
qproc->dump_complete_mask = 0;
static const struct rproc_ops q6v5_ops = {
.start = q6v5_start,
.stop = q6v5_stop,
- .da_to_va = q6v5_da_to_va,
.parse_fw = qcom_q6v5_register_dump_segments,
.load = q6v5_load,
};
qproc->halt_modem = args.args[1];
qproc->halt_nc = args.args[2];
- if (qproc->has_halt_nav) {
- struct platform_device *nav_pdev;
-
+ if (qproc->has_spare_reg) {
ret = of_parse_phandle_with_fixed_args(pdev->dev.of_node,
- "qcom,halt-nav-regs",
+ "qcom,spare-regs",
1, 0, &args);
if (ret < 0) {
- dev_err(&pdev->dev, "failed to parse halt-nav-regs\n");
- return -EINVAL;
- }
-
- nav_pdev = of_find_device_by_node(args.np);
- of_node_put(args.np);
- if (!nav_pdev) {
- dev_err(&pdev->dev, "failed to get mss clock device\n");
- return -EPROBE_DEFER;
- }
-
- qproc->halt_nav_map = dev_get_regmap(&nav_pdev->dev, NULL);
- if (!qproc->halt_nav_map) {
- dev_err(&pdev->dev, "failed to get map from device\n");
- return -EINVAL;
- }
- qproc->halt_nav = args.args[0];
-
- ret = of_parse_phandle_with_fixed_args(pdev->dev.of_node,
- "qcom,halt-nav-regs",
- 1, 1, &args);
- if (ret < 0) {
- dev_err(&pdev->dev, "failed to parse halt-nav-regs\n");
+ dev_err(&pdev->dev, "failed to parse spare-regs\n");
return -EINVAL;
}
dev_pm_domain_detach(devs[i], false);
return ret;
-};
+}
static void q6v5_pds_detach(struct q6v5 *qproc, struct device **pds,
size_t pd_count)
return PTR_ERR(qproc->mss_restart);
}
- if (qproc->has_alt_reset || qproc->has_halt_nav) {
+ if (qproc->has_alt_reset || qproc->has_spare_reg) {
qproc->pdc_reset = devm_reset_control_get_exclusive(qproc->dev,
"pdc_reset");
if (IS_ERR(qproc->pdc_reset)) {
struct resource r;
int ret;
+ /*
+ * In the absence of mba/mpss sub-child, extract the mba and mpss
+ * reserved memory regions from device's memory-region property.
+ */
child = of_get_child_by_name(qproc->dev->of_node, "mba");
- node = of_parse_phandle(child, "memory-region", 0);
+ if (!child)
+ node = of_parse_phandle(qproc->dev->of_node,
+ "memory-region", 0);
+ else
+ node = of_parse_phandle(child, "memory-region", 0);
+
ret = of_address_to_resource(node, 0, &r);
if (ret) {
dev_err(qproc->dev, "unable to resolve mba region\n");
return -EBUSY;
}
- child = of_get_child_by_name(qproc->dev->of_node, "mpss");
- node = of_parse_phandle(child, "memory-region", 0);
+ if (!child) {
+ node = of_parse_phandle(qproc->dev->of_node,
+ "memory-region", 1);
+ } else {
+ child = of_get_child_by_name(qproc->dev->of_node, "mpss");
+ node = of_parse_phandle(child, "memory-region", 0);
+ }
+
ret = of_address_to_resource(node, 0, &r);
if (ret) {
dev_err(qproc->dev, "unable to resolve mpss region\n");
qproc->mpss_phys = qproc->mpss_reloc = r.start;
qproc->mpss_size = resource_size(&r);
- qproc->mpss_region = devm_ioremap_wc(qproc->dev, qproc->mpss_phys, qproc->mpss_size);
- if (!qproc->mpss_region) {
- dev_err(qproc->dev, "unable to map memory region: %pa+%zx\n",
- &r.start, qproc->mpss_size);
- return -EBUSY;
- }
return 0;
}
}
rproc->auto_boot = false;
+ rproc_coredump_set_elf_info(rproc, ELFCLASS32, EM_NONE);
qproc = (struct q6v5 *)rproc->priv;
qproc->dev = &pdev->dev;
ret = of_property_read_string_index(pdev->dev.of_node, "firmware-name",
1, &qproc->hexagon_mdt_image);
if (ret < 0 && ret != -EINVAL)
- return ret;
+ goto free_rproc;
platform_set_drvdata(pdev, qproc);
- qproc->has_halt_nav = desc->has_halt_nav;
+ qproc->has_spare_reg = desc->has_spare_reg;
ret = q6v5_init_mem(qproc, pdev);
if (ret)
goto free_rproc;
qproc->mpss_perm = BIT(QCOM_SCM_VMID_HLOS);
qproc->mba_perm = BIT(QCOM_SCM_VMID_HLOS);
- qcom_add_glink_subdev(rproc, &qproc->glink_subdev);
+ qcom_add_glink_subdev(rproc, &qproc->glink_subdev, "mpss");
qcom_add_smd_subdev(rproc, &qproc->smd_subdev);
qcom_add_ssr_subdev(rproc, &qproc->ssr_subdev, "mpss");
qcom_add_ipa_notify_subdev(rproc, &qproc->ipa_notify_subdev);
qproc->sysmon = qcom_add_sysmon_subdev(rproc, "modem", 0x12);
if (IS_ERR(qproc->sysmon)) {
ret = PTR_ERR(qproc->sysmon);
- goto detach_proxy_pds;
+ goto remove_subdevs;
}
ret = rproc_add(rproc);
if (ret)
- goto detach_proxy_pds;
+ goto remove_sysmon_subdev;
return 0;
-detach_proxy_pds:
+remove_sysmon_subdev:
+ qcom_remove_sysmon_subdev(qproc->sysmon);
+remove_subdevs:
qcom_remove_ipa_notify_subdev(qproc->rproc, &qproc->ipa_notify_subdev);
+ qcom_remove_ssr_subdev(rproc, &qproc->ssr_subdev);
+ qcom_remove_smd_subdev(rproc, &qproc->smd_subdev);
+ qcom_remove_glink_subdev(rproc, &qproc->glink_subdev);
+detach_proxy_pds:
q6v5_pds_detach(qproc, qproc->proxy_pds, qproc->proxy_pd_count);
detach_active_pds:
q6v5_pds_detach(qproc, qproc->active_pds, qproc->active_pd_count);
static int q6v5_remove(struct platform_device *pdev)
{
struct q6v5 *qproc = platform_get_drvdata(pdev);
+ struct rproc *rproc = qproc->rproc;
- rproc_del(qproc->rproc);
+ rproc_del(rproc);
qcom_remove_sysmon_subdev(qproc->sysmon);
- qcom_remove_ipa_notify_subdev(qproc->rproc, &qproc->ipa_notify_subdev);
- qcom_remove_glink_subdev(qproc->rproc, &qproc->glink_subdev);
- qcom_remove_smd_subdev(qproc->rproc, &qproc->smd_subdev);
- qcom_remove_ssr_subdev(qproc->rproc, &qproc->ssr_subdev);
+ qcom_remove_ipa_notify_subdev(rproc, &qproc->ipa_notify_subdev);
+ qcom_remove_ssr_subdev(rproc, &qproc->ssr_subdev);
+ qcom_remove_smd_subdev(rproc, &qproc->smd_subdev);
+ qcom_remove_glink_subdev(rproc, &qproc->glink_subdev);
- q6v5_pds_detach(qproc, qproc->active_pds, qproc->active_pd_count);
q6v5_pds_detach(qproc, qproc->proxy_pds, qproc->proxy_pd_count);
+ q6v5_pds_detach(qproc, qproc->active_pds, qproc->active_pd_count);
- rproc_free(qproc->rproc);
+ rproc_free(rproc);
return 0;
}
.active_clk_names = (char*[]){
"mnoc_axi",
"nav",
- "mss_nav",
- "mss_crypto",
NULL
},
.active_pd_names = (char*[]){
},
.need_mem_protection = true,
.has_alt_reset = false,
- .has_halt_nav = true,
+ .has_spare_reg = true,
.version = MSS_SC7180,
};
},
.need_mem_protection = true,
.has_alt_reset = true,
- .has_halt_nav = false,
+ .has_spare_reg = false,
.version = MSS_SDM845,
};
},
.need_mem_protection = true,
.has_alt_reset = false,
- .has_halt_nav = false,
+ .has_spare_reg = false,
.version = MSS_MSM8998,
};
},
.need_mem_protection = true,
.has_alt_reset = false,
- .has_halt_nav = false,
+ .has_spare_reg = false,
.version = MSS_MSM8996,
};
},
.need_mem_protection = false,
.has_alt_reset = false,
- .has_halt_nav = false,
+ .has_spare_reg = false,
.version = MSS_MSM8916,
};
},
.need_mem_protection = false,
.has_alt_reset = false,
- .has_halt_nav = false,
+ .has_spare_reg = false,
.version = MSS_MSM8974,
};
projects / linux-2.6-microblaze.git / blobdiff