#define PF8X00_SWXILIM_SHIFT 3
#define PF8X00_SWXILIM_MASK GENMASK(4, 3)
#define PF8X00_SWXPHASE_MASK GENMASK(2, 0)
-#define PF8X00_SWXPHASE_DEFAULT 0
#define PF8X00_SWXPHASE_SHIFT 7
enum pf8x00_devid {
#define PF8X00_DEVICE_FAM_MASK GENMASK(7, 4)
#define PF8X00_DEVICE_ID_MASK GENMASK(3, 0)
-struct pf8x00_regulator {
+struct pf8x00_regulator_data {
struct regulator_desc desc;
- u8 ilim;
- u8 phase_shift;
+ unsigned int suspend_enable_reg;
+ unsigned int suspend_enable_mask;
+ unsigned int suspend_voltage_reg;
+ unsigned int suspend_voltage_cache;
};
struct pf8x00_chip {
3100000, 3150000, 3200000, 3300000, 3350000, 1650000, 1700000, 5000000,
};
-#define SWV(i) (6250 * i + 400000)
-#define SWV_LINE(i) SWV(i*8+0), SWV(i*8+1), SWV(i*8+2), SWV(i*8+3), \
- SWV(i*8+4), SWV(i*8+5), SWV(i*8+6), SWV(i*8+7)
+/* Output: 2.1A to 4.5A */
+static const unsigned int pf8x00_sw_current_table[] = {
+ 2100000, 2600000, 3000000, 4500000,
+};
/* Output: 0.4V to 1.8V */
-static const int pf8x00_sw1_to_6_voltages[] = {
- SWV_LINE(0),
- SWV_LINE(1),
- SWV_LINE(2),
- SWV_LINE(3),
- SWV_LINE(4),
- SWV_LINE(5),
- SWV_LINE(6),
- SWV_LINE(7),
- SWV_LINE(8),
- SWV_LINE(9),
- SWV_LINE(10),
- SWV_LINE(11),
- SWV_LINE(12),
- SWV_LINE(13),
- SWV_LINE(14),
- SWV_LINE(15),
- SWV_LINE(16),
- SWV_LINE(17),
- SWV_LINE(18),
- SWV_LINE(19),
- SWV_LINE(20),
- SWV_LINE(21),
- 1500000, 1800000,
+#define PF8XOO_SW1_6_VOLTAGE_NUM 0xB2
+static const struct linear_range pf8x00_sw1_to_6_voltages[] = {
+ REGULATOR_LINEAR_RANGE(400000, 0x00, 0xB0, 6250),
+ REGULATOR_LINEAR_RANGE(1800000, 0xB1, 0xB1, 0),
};
/* Output: 1.0V to 4.1V */
0, 1800000, 3000000, 3300000,
};
-static struct pf8x00_regulator *desc_to_regulator(const struct regulator_desc *desc)
-{
- return container_of(desc, struct pf8x00_regulator, desc);
-}
-
-static void swxilim_select(const struct regulator_desc *desc, int ilim)
+static void swxilim_select(struct pf8x00_chip *chip, int id, int ilim)
{
- struct pf8x00_regulator *data = desc_to_regulator(desc);
u8 ilim_sel;
+ u8 reg = PF8X00_SW_BASE(id) + SW_CONFIG2;
switch (ilim) {
case 2100:
break;
}
- data->ilim = ilim_sel;
+ regmap_update_bits(chip->regmap, reg,
+ PF8X00_SWXILIM_MASK,
+ ilim_sel << PF8X00_SWXILIM_SHIFT);
}
-static int pf8x00_of_parse_cb(struct device_node *np,
+static void handle_ilim_property(struct device_node *np,
const struct regulator_desc *desc,
struct regulator_config *config)
{
- struct pf8x00_regulator *data = desc_to_regulator(desc);
struct pf8x00_chip *chip = config->driver_data;
+ int ret;
+ int val;
+
+ if ((desc->id >= PF8X00_BUCK1) && (desc->id <= PF8X00_BUCK7)) {
+ ret = of_property_read_u32(np, "nxp,ilim-ma", &val);
+ if (ret) {
+ dev_dbg(chip->dev, "unspecified ilim for BUCK%d, use value stored in OTP\n",
+ desc->id - PF8X00_LDO4);
+ return;
+ }
+
+ dev_warn(chip->dev, "nxp,ilim-ma is deprecated, please use regulator-max-microamp\n");
+ swxilim_select(chip, desc->id, val);
+
+ } else
+ dev_warn(chip->dev, "nxp,ilim-ma used with incorrect regulator (%d)\n", desc->id);
+}
+
+static void handle_shift_property(struct device_node *np,
+ const struct regulator_desc *desc,
+ struct regulator_config *config)
+{
+ unsigned char id = desc->id - PF8X00_LDO4;
+ unsigned char reg = PF8X00_SW_BASE(id) + SW_CONFIG2;
+ struct pf8x00_chip *chip = config->driver_data;
+
int phase;
int val;
int ret;
+ if ((desc->id >= PF8X00_BUCK1) && (desc->id <= PF8X00_BUCK7)) {
+ ret = of_property_read_u32(np, "nxp,phase-shift", &val);
+ if (ret) {
+ dev_dbg(chip->dev,
+ "unspecified phase-shift for BUCK%d, using OTP configuration\n",
+ id);
+ return;
+ }
- ret = of_property_read_u32(np, "nxp,ilim-ma", &val);
- if (ret)
- dev_dbg(chip->dev, "unspecified ilim for BUCK%d, use 2100 mA\n",
- desc->id - PF8X00_LDO4);
+ if (val < 0 || val > 315 || val % 45 != 0) {
+ dev_warn(config->dev,
+ "invalid phase_shift %d for BUCK%d, using OTP configuration\n",
+ val, id);
+ return;
+ }
- swxilim_select(desc, val);
+ phase = val / 45;
- ret = of_property_read_u32(np, "nxp,phase-shift", &val);
- if (ret) {
- dev_dbg(chip->dev,
- "unspecified phase-shift for BUCK%d, use 0 degrees\n",
- desc->id - PF8X00_LDO4);
- val = PF8X00_SWXPHASE_DEFAULT;
+ if (phase >= 1)
+ phase -= 1;
+ else
+ phase = PF8X00_SWXPHASE_SHIFT;
+
+ regmap_update_bits(chip->regmap, reg,
+ PF8X00_SWXPHASE_MASK,
+ phase);
+ } else
+ dev_warn(chip->dev, "nxp,phase-shift used with incorrect regulator (%d)\n", id);
+
+}
+
+static int pf8x00_of_parse_cb(struct device_node *np,
+ const struct regulator_desc *desc,
+ struct regulator_config *config)
+{
+
+ handle_ilim_property(np, desc, config);
+ handle_shift_property(np, desc, config);
+
+ return 0;
+}
+
+static int pf8x00_suspend_enable(struct regulator_dev *rdev)
+{
+ struct pf8x00_regulator_data *regl = rdev_get_drvdata(rdev);
+ struct regmap *rmap = rdev_get_regmap(rdev);
+
+ return regmap_update_bits(rmap, regl->suspend_enable_reg,
+ regl->suspend_enable_mask,
+ regl->suspend_enable_mask);
+}
+
+static int pf8x00_suspend_disable(struct regulator_dev *rdev)
+{
+ struct pf8x00_regulator_data *regl = rdev_get_drvdata(rdev);
+ struct regmap *rmap = rdev_get_regmap(rdev);
+
+ return regmap_update_bits(rmap, regl->suspend_enable_reg,
+ regl->suspend_enable_mask, 0);
+}
+
+static int pf8x00_set_suspend_voltage(struct regulator_dev *rdev, int uV)
+{
+ struct pf8x00_regulator_data *regl = rdev_get_drvdata(rdev);
+ int ret;
+
+ if (regl->suspend_voltage_cache == uV)
+ return 0;
+
+ ret = regulator_map_voltage_iterate(rdev, uV, uV);
+ if (ret < 0) {
+ dev_err(rdev_get_dev(rdev), "failed to map %i uV\n", uV);
+ return ret;
}
- phase = val / 45;
- if ((phase * 45) != val) {
- dev_warn(config->dev,
- "invalid phase_shift %d for BUCK%d, use 0 degrees\n",
- (phase * 45), desc->id - PF8X00_LDO4);
- phase = PF8X00_SWXPHASE_SHIFT;
+ dev_dbg(rdev_get_dev(rdev), "uV: %i, reg: 0x%x, msk: 0x%x, val: 0x%x\n",
+ uV, regl->suspend_voltage_reg, regl->desc.vsel_mask, ret);
+ ret = regmap_update_bits(rdev->regmap, regl->suspend_voltage_reg,
+ regl->desc.vsel_mask, ret);
+ if (ret < 0) {
+ dev_err(rdev_get_dev(rdev), "failed to set %i uV\n", uV);
+ return ret;
}
- data->phase_shift = (phase >= 1) ? phase - 1 : PF8X00_SWXPHASE_SHIFT;
+ regl->suspend_voltage_cache = uV;
return 0;
}
.list_voltage = regulator_list_voltage_table,
.set_voltage_sel = regulator_set_voltage_sel_regmap,
.get_voltage_sel = regulator_get_voltage_sel_regmap,
+ .set_suspend_enable = pf8x00_suspend_enable,
+ .set_suspend_disable = pf8x00_suspend_disable,
+ .set_suspend_voltage = pf8x00_set_suspend_voltage,
};
-static const struct regulator_ops pf8x00_buck_ops = {
+
+static const struct regulator_ops pf8x00_buck1_6_ops = {
+ .enable = regulator_enable_regmap,
+ .disable = regulator_disable_regmap,
+ .is_enabled = regulator_is_enabled_regmap,
+ .list_voltage = regulator_list_voltage_linear_range,
+ .set_voltage_sel = regulator_set_voltage_sel_regmap,
+ .get_voltage_sel = regulator_get_voltage_sel_regmap,
+ .get_current_limit = regulator_get_current_limit_regmap,
+ .set_current_limit = regulator_set_current_limit_regmap,
+ .set_suspend_enable = pf8x00_suspend_enable,
+ .set_suspend_disable = pf8x00_suspend_disable,
+ .set_suspend_voltage = pf8x00_set_suspend_voltage,
+};
+
+static const struct regulator_ops pf8x00_buck7_ops = {
.enable = regulator_enable_regmap,
.disable = regulator_disable_regmap,
.is_enabled = regulator_is_enabled_regmap,
.list_voltage = regulator_list_voltage_table,
.set_voltage_sel = regulator_set_voltage_sel_regmap,
.get_voltage_sel = regulator_get_voltage_sel_regmap,
+ .get_current_limit = regulator_get_current_limit_regmap,
+ .set_current_limit = regulator_set_current_limit_regmap,
+ .set_suspend_enable = pf8x00_suspend_enable,
+ .set_suspend_disable = pf8x00_suspend_disable,
};
static const struct regulator_ops pf8x00_vsnvs_ops = {
.disable_val = 0x0, \
.enable_mask = 2, \
}, \
+ .suspend_enable_reg = (base) + LDO_CONFIG2, \
+ .suspend_enable_mask = 1, \
+ .suspend_voltage_reg = (base) + LDO_STBY_VOLT, \
}
#define PF8X00BUCK(_id, _name, base, voltages) \
.of_match = _name, \
.regulators_node = "regulators", \
.of_parse_cb = pf8x00_of_parse_cb, \
- .n_voltages = ARRAY_SIZE(voltages), \
- .ops = &pf8x00_buck_ops, \
+ .n_voltages = PF8XOO_SW1_6_VOLTAGE_NUM, \
+ .ops = &pf8x00_buck1_6_ops, \
.type = REGULATOR_VOLTAGE, \
.id = PF8X00_BUCK ## _id, \
.owner = THIS_MODULE, \
+ .ramp_delay = 19000, \
+ .linear_ranges = pf8x00_sw1_to_6_voltages, \
+ .n_linear_ranges = \
+ ARRAY_SIZE(pf8x00_sw1_to_6_voltages), \
+ .vsel_reg = (base) + SW_RUN_VOLT, \
+ .vsel_mask = 0xff, \
+ .curr_table = pf8x00_sw_current_table, \
+ .n_current_limits = \
+ ARRAY_SIZE(pf8x00_sw_current_table), \
+ .csel_reg = (base) + SW_CONFIG2, \
+ .csel_mask = PF8X00_SWXILIM_MASK, \
+ .enable_reg = (base) + SW_MODE1, \
+ .enable_val = 0x3, \
+ .disable_val = 0x0, \
+ .enable_mask = 0x3, \
+ .enable_time = 500, \
+ }, \
+ .suspend_enable_reg = (base) + SW_MODE1, \
+ .suspend_enable_mask = 0xc, \
+ .suspend_voltage_reg = (base) + SW_STBY_VOLT, \
+ }
+
+#define PF8X00BUCK7(_name, base, voltages) \
+ [PF8X00_BUCK7] = { \
+ .desc = { \
+ .name = _name, \
+ .of_match = _name, \
+ .regulators_node = "regulators", \
+ .of_parse_cb = pf8x00_of_parse_cb, \
+ .n_voltages = ARRAY_SIZE(voltages), \
+ .ops = &pf8x00_buck7_ops, \
+ .type = REGULATOR_VOLTAGE, \
+ .id = PF8X00_BUCK7, \
+ .owner = THIS_MODULE, \
+ .ramp_delay = 19000, \
.volt_table = voltages, \
.vsel_reg = (base) + SW_RUN_VOLT, \
.vsel_mask = 0xff, \
+ .curr_table = pf8x00_sw_current_table, \
+ .n_current_limits = \
+ ARRAY_SIZE(pf8x00_sw_current_table), \
+ .csel_reg = (base) + SW_CONFIG2, \
+ .csel_mask = PF8X00_SWXILIM_MASK, \
.enable_reg = (base) + SW_MODE1, \
.enable_val = 0x3, \
.disable_val = 0x0, \
}, \
}
+
#define PF8X00VSNVS(_name, base, voltages) \
[PF8X00_VSNVS] = { \
.desc = { \
}, \
}
-static struct pf8x00_regulator pf8x00_regulators_data[PF8X00_MAX_REGULATORS] = {
+static struct pf8x00_regulator_data pf8x00_regs_data[PF8X00_MAX_REGULATORS] = {
PF8X00LDO(1, "ldo1", PF8X00_LDO_BASE(PF8X00_LDO1), pf8x00_ldo_voltages),
PF8X00LDO(2, "ldo2", PF8X00_LDO_BASE(PF8X00_LDO2), pf8x00_ldo_voltages),
PF8X00LDO(3, "ldo3", PF8X00_LDO_BASE(PF8X00_LDO3), pf8x00_ldo_voltages),
PF8X00BUCK(4, "buck4", PF8X00_SW_BASE(PF8X00_BUCK4), pf8x00_sw1_to_6_voltages),
PF8X00BUCK(5, "buck5", PF8X00_SW_BASE(PF8X00_BUCK5), pf8x00_sw1_to_6_voltages),
PF8X00BUCK(6, "buck6", PF8X00_SW_BASE(PF8X00_BUCK6), pf8x00_sw1_to_6_voltages),
- PF8X00BUCK(7, "buck7", PF8X00_SW_BASE(PF8X00_BUCK7), pf8x00_sw7_voltages),
+ PF8X00BUCK7("buck7", PF8X00_SW_BASE(PF8X00_BUCK7), pf8x00_sw7_voltages),
PF8X00VSNVS("vsnvs", PF8X00_VSNVS_CONFIG1, pf8x00_vsnvs_voltages),
};
name = "PF8121A";
break;
case PF8200:
- name = "PF8100";
+ name = "PF8200";
break;
default:
dev_err(chip->dev, "Unknown pf8x00 device id 0x%x\n", dev_id);
if (ret)
return ret;
- for (id = 0; id < ARRAY_SIZE(pf8x00_regulators_data); id++) {
- struct pf8x00_regulator *data = &pf8x00_regulators_data[id];
+ for (id = 0; id < ARRAY_SIZE(pf8x00_regs_data); id++) {
+ struct pf8x00_regulator_data *data = &pf8x00_regs_data[id];
struct regulator_dev *rdev;
config.dev = chip->dev;
- config.driver_data = chip;
+ config.driver_data = data;
config.regmap = chip->regmap;
rdev = devm_regulator_register(&client->dev, &data->desc, &config);
"failed to register %s regulator\n", data->desc.name);
return PTR_ERR(rdev);
}
-
- if ((id >= PF8X00_BUCK1) && (id <= PF8X00_BUCK7)) {
- u8 reg = PF8X00_SW_BASE(id) + SW_CONFIG2;
-
- regmap_update_bits(chip->regmap, reg,
- PF8X00_SWXPHASE_MASK,
- data->phase_shift);
-
- regmap_update_bits(chip->regmap, reg,
- PF8X00_SWXILIM_MASK,
- data->ilim << PF8X00_SWXILIM_SHIFT);
- }
}
return 0;
projects / linux-2.6-microblaze.git / blobdiff