struct pwm_state cstate;
u32 ctrl, duty = 0, period = 0, val;
int ret;
+ unsigned int delay_jiffies;
unsigned int delay_us, prescaler = 0;
- unsigned long now;
- unsigned long next_period;
bool bypass;
pwm_get_state(pwm, &cstate);
val = (duty & PWM_DTY_MASK) | PWM_PRD(period);
sun4i_pwm_writel(sun4i_pwm, val, PWM_CH_PRD(pwm->hwpwm));
- next_period = jiffies +
- nsecs_to_jiffies(cstate.period + 1000);
if (state->polarity != PWM_POLARITY_NORMAL)
ctrl &= ~BIT_CH(PWM_ACT_STATE, pwm->hwpwm);
return 0;
/* We need a full period to elapse before disabling the channel. */
- now = jiffies;
- if (time_before(now, next_period)) {
- delay_us = jiffies_to_usecs(next_period - now);
- if ((delay_us / 500) > MAX_UDELAY_MS)
- msleep(delay_us / 1000 + 1);
- else
- usleep_range(delay_us, delay_us * 2);
- }
+ delay_jiffies = nsecs_to_jiffies(cstate.period + 1000);
+ delay_us = jiffies_to_usecs(delay_jiffies);
+ if ((delay_us / 500) > MAX_UDELAY_MS)
+ msleep(delay_us / 1000 + 1);
+ else
+ usleep_range(delay_us, delay_us * 2);
spin_lock(&sun4i_pwm->ctrl_lock);
ctrl = sun4i_pwm_readl(sun4i_pwm, PWM_CTRL_REG);