pwm: meson: generalize 4 inputs clock on meson8 pwm type

[linux-2.6-microblaze.git] / drivers / pwm / pwm-meson.c

diff --git a/drivers/pwm/pwm-meson.c b/drivers/pwm/pwm-meson.c
index 40a5b64..a02fdbc 100644 (file)
--- a/drivers/pwm/pwm-meson.c
+++ b/drivers/pwm/pwm-meson.c
@@ -60,7 +60,7 @@
 #define MISC_A_EN              BIT(0)
 
 #define MESON_NUM_PWMS         2
-#define MESON_MAX_MUX_PARENTS  4
+#define MESON_NUM_MUX_PARENTS  4
 
 static struct meson_pwm_channel_data {
        u8              reg_offset;
@@ -97,8 +97,7 @@ struct meson_pwm_channel {
 };
 
 struct meson_pwm_data {
-       const char * const *parent_names;
-       unsigned int num_parents;
+       const char *const parent_names[MESON_NUM_MUX_PARENTS];
 };
 
 struct meson_pwm {
@@ -339,62 +338,32 @@ static const struct pwm_ops meson_pwm_ops = {
        .get_state = meson_pwm_get_state,
 };
 
-static const char * const pwm_meson8b_parent_names[] = {
-       "xtal", NULL, "fclk_div4", "fclk_div3"
-};
-
 static const struct meson_pwm_data pwm_meson8b_data = {
-       .parent_names = pwm_meson8b_parent_names,
-       .num_parents = ARRAY_SIZE(pwm_meson8b_parent_names),
+       .parent_names = { "xtal", NULL, "fclk_div4", "fclk_div3" },
 };
 
 /*
  * Only the 2 first inputs of the GXBB AO PWMs are valid
  * The last 2 are grounded
  */
-static const char * const pwm_gxbb_ao_parent_names[] = {
-       "xtal", "clk81"
-};
-
 static const struct meson_pwm_data pwm_gxbb_ao_data = {
-       .parent_names = pwm_gxbb_ao_parent_names,
-       .num_parents = ARRAY_SIZE(pwm_gxbb_ao_parent_names),
-};
-
-static const char * const pwm_axg_ee_parent_names[] = {
-       "xtal", "fclk_div5", "fclk_div4", "fclk_div3"
+       .parent_names = { "xtal", "clk81", NULL, NULL },
 };
 
 static const struct meson_pwm_data pwm_axg_ee_data = {
-       .parent_names = pwm_axg_ee_parent_names,
-       .num_parents = ARRAY_SIZE(pwm_axg_ee_parent_names),
-};
-
-static const char * const pwm_axg_ao_parent_names[] = {
-       "xtal", "axg_ao_clk81", "fclk_div4", "fclk_div5"
+       .parent_names = { "xtal", "fclk_div5", "fclk_div4", "fclk_div3" },
 };
 
 static const struct meson_pwm_data pwm_axg_ao_data = {
-       .parent_names = pwm_axg_ao_parent_names,
-       .num_parents = ARRAY_SIZE(pwm_axg_ao_parent_names),
-};
-
-static const char * const pwm_g12a_ao_ab_parent_names[] = {
-       "xtal", "g12a_ao_clk81", "fclk_div4", "fclk_div5"
+       .parent_names = { "xtal", "axg_ao_clk81", "fclk_div4", "fclk_div5" },
 };
 
 static const struct meson_pwm_data pwm_g12a_ao_ab_data = {
-       .parent_names = pwm_g12a_ao_ab_parent_names,
-       .num_parents = ARRAY_SIZE(pwm_g12a_ao_ab_parent_names),
-};
-
-static const char * const pwm_g12a_ao_cd_parent_names[] = {
-       "xtal", "g12a_ao_clk81",
+       .parent_names = { "xtal", "g12a_ao_clk81", "fclk_div4", "fclk_div5" },
 };
 
 static const struct meson_pwm_data pwm_g12a_ao_cd_data = {
-       .parent_names = pwm_g12a_ao_cd_parent_names,
-       .num_parents = ARRAY_SIZE(pwm_g12a_ao_cd_parent_names),
+       .parent_names = { "xtal", "g12a_ao_clk81", NULL, NULL },
 };
 
 static const struct of_device_id meson_pwm_matches[] = {
@@ -437,13 +406,13 @@ MODULE_DEVICE_TABLE(of, meson_pwm_matches);
 static int meson_pwm_init_channels(struct pwm_chip *chip)
 {
        struct meson_pwm *meson = to_meson_pwm(chip);
-       struct clk_parent_data mux_parent_data[MESON_MAX_MUX_PARENTS] = {};
+       struct clk_parent_data mux_parent_data[MESON_NUM_MUX_PARENTS] = {};
        struct device *dev = pwmchip_parent(chip);
        unsigned int i;
        char name[255];
        int err;
 
-       for (i = 0; i < meson->data->num_parents; i++) {
+       for (i = 0; i < MESON_NUM_MUX_PARENTS; i++) {
                mux_parent_data[i].index = -1;
                mux_parent_data[i].name = meson->data->parent_names[i];
        }
@@ -459,7 +428,7 @@ static int meson_pwm_init_channels(struct pwm_chip *chip)
                init.ops = &clk_mux_ops;
                init.flags = 0;
                init.parent_data = mux_parent_data;
-               init.num_parents = meson->data->num_parents;
+               init.num_parents = MESON_NUM_MUX_PARENTS;
 
                channel->mux.reg = meson->base + REG_MISC_AB;
                channel->mux.shift =