Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

[linux-2.6-microblaze.git] / drivers / perf / qcom_l2_pmu.c

diff --git a/drivers/perf/qcom_l2_pmu.c b/drivers/perf/qcom_l2_pmu.c
index 4da37f6..23a0e00 100644 (file)
--- a/drivers/perf/qcom_l2_pmu.c
+++ b/drivers/perf/qcom_l2_pmu.c
@@ -23,6 +23,7 @@
 #include <asm/barrier.h>
 #include <asm/local64.h>
 #include <asm/sysreg.h>
+#include <soc/qcom/kryo-l2-accessors.h>
 
 #define MAX_L2_CTRS             9
 
@@ -79,8 +80,6 @@
 #define L2_COUNTER_RELOAD       BIT_ULL(31)
 #define L2_CYCLE_COUNTER_RELOAD BIT_ULL(63)
 
-#define L2CPUSRSELR_EL1         sys_reg(3, 3, 15, 0, 6)
-#define L2CPUSRDR_EL1           sys_reg(3, 3, 15, 0, 7)
 
 #define reg_idx(reg, i)         (((i) * IA_L2_REG_OFFSET) + reg##_BASE)
 
@@ -99,48 +98,7 @@
 #define L2_EVENT_STREX                     0x421
 #define L2_EVENT_CLREX                     0x422
 
-static DEFINE_RAW_SPINLOCK(l2_access_lock);
 
-/**
- * set_l2_indirect_reg: write value to an L2 register
- * @reg: Address of L2 register.
- * @value: Value to be written to register.
- *
- * Use architecturally required barriers for ordering between system register
- * accesses
- */
-static void set_l2_indirect_reg(u64 reg, u64 val)
-{
-       unsigned long flags;
-
-       raw_spin_lock_irqsave(&l2_access_lock, flags);
-       write_sysreg_s(reg, L2CPUSRSELR_EL1);
-       isb();
-       write_sysreg_s(val, L2CPUSRDR_EL1);
-       isb();
-       raw_spin_unlock_irqrestore(&l2_access_lock, flags);
-}
-
-/**
- * get_l2_indirect_reg: read an L2 register value
- * @reg: Address of L2 register.
- *
- * Use architecturally required barriers for ordering between system register
- * accesses
- */
-static u64 get_l2_indirect_reg(u64 reg)
-{
-       u64 val;
-       unsigned long flags;
-
-       raw_spin_lock_irqsave(&l2_access_lock, flags);
-       write_sysreg_s(reg, L2CPUSRSELR_EL1);
-       isb();
-       val = read_sysreg_s(L2CPUSRDR_EL1);
-       raw_spin_unlock_irqrestore(&l2_access_lock, flags);
-
-       return val;
-}
 
 struct cluster_pmu;
 
@@ -211,28 +169,28 @@ static inline struct cluster_pmu *get_cluster_pmu(
 static void cluster_pmu_reset(void)
 {
        /* Reset all counters */
-       set_l2_indirect_reg(L2PMCR, L2PMCR_RESET_ALL);
-       set_l2_indirect_reg(L2PMCNTENCLR, l2_counter_present_mask);
-       set_l2_indirect_reg(L2PMINTENCLR, l2_counter_present_mask);
-       set_l2_indirect_reg(L2PMOVSCLR, l2_counter_present_mask);
+       kryo_l2_set_indirect_reg(L2PMCR, L2PMCR_RESET_ALL);
+       kryo_l2_set_indirect_reg(L2PMCNTENCLR, l2_counter_present_mask);
+       kryo_l2_set_indirect_reg(L2PMINTENCLR, l2_counter_present_mask);
+       kryo_l2_set_indirect_reg(L2PMOVSCLR, l2_counter_present_mask);
 }
 
 static inline void cluster_pmu_enable(void)
 {
-       set_l2_indirect_reg(L2PMCR, L2PMCR_COUNTERS_ENABLE);
+       kryo_l2_set_indirect_reg(L2PMCR, L2PMCR_COUNTERS_ENABLE);
 }
 
 static inline void cluster_pmu_disable(void)
 {
-       set_l2_indirect_reg(L2PMCR, L2PMCR_COUNTERS_DISABLE);
+       kryo_l2_set_indirect_reg(L2PMCR, L2PMCR_COUNTERS_DISABLE);
 }
 
 static inline void cluster_pmu_counter_set_value(u32 idx, u64 value)
 {
        if (idx == l2_cycle_ctr_idx)
-               set_l2_indirect_reg(L2PMCCNTR, value);
+               kryo_l2_set_indirect_reg(L2PMCCNTR, value);
        else
-               set_l2_indirect_reg(reg_idx(IA_L2PMXEVCNTR, idx), value);
+               kryo_l2_set_indirect_reg(reg_idx(IA_L2PMXEVCNTR, idx), value);
 }
 
 static inline u64 cluster_pmu_counter_get_value(u32 idx)
@@ -240,46 +198,46 @@ static inline u64 cluster_pmu_counter_get_value(u32 idx)
        u64 value;
 
        if (idx == l2_cycle_ctr_idx)
-               value = get_l2_indirect_reg(L2PMCCNTR);
+               value = kryo_l2_get_indirect_reg(L2PMCCNTR);
        else
-               value = get_l2_indirect_reg(reg_idx(IA_L2PMXEVCNTR, idx));
+               value = kryo_l2_get_indirect_reg(reg_idx(IA_L2PMXEVCNTR, idx));
 
        return value;
 }
 
 static inline void cluster_pmu_counter_enable(u32 idx)
 {
-       set_l2_indirect_reg(L2PMCNTENSET, idx_to_reg_bit(idx));
+       kryo_l2_set_indirect_reg(L2PMCNTENSET, idx_to_reg_bit(idx));
 }
 
 static inline void cluster_pmu_counter_disable(u32 idx)
 {
-       set_l2_indirect_reg(L2PMCNTENCLR, idx_to_reg_bit(idx));
+       kryo_l2_set_indirect_reg(L2PMCNTENCLR, idx_to_reg_bit(idx));
 }
 
 static inline void cluster_pmu_counter_enable_interrupt(u32 idx)
 {
-       set_l2_indirect_reg(L2PMINTENSET, idx_to_reg_bit(idx));
+       kryo_l2_set_indirect_reg(L2PMINTENSET, idx_to_reg_bit(idx));
 }
 
 static inline void cluster_pmu_counter_disable_interrupt(u32 idx)
 {
-       set_l2_indirect_reg(L2PMINTENCLR, idx_to_reg_bit(idx));
+       kryo_l2_set_indirect_reg(L2PMINTENCLR, idx_to_reg_bit(idx));
 }
 
 static inline void cluster_pmu_set_evccntcr(u32 val)
 {
-       set_l2_indirect_reg(L2PMCCNTCR, val);
+       kryo_l2_set_indirect_reg(L2PMCCNTCR, val);
 }
 
 static inline void cluster_pmu_set_evcntcr(u32 ctr, u32 val)
 {
-       set_l2_indirect_reg(reg_idx(IA_L2PMXEVCNTCR, ctr), val);
+       kryo_l2_set_indirect_reg(reg_idx(IA_L2PMXEVCNTCR, ctr), val);
 }
 
 static inline void cluster_pmu_set_evtyper(u32 ctr, u32 val)
 {
-       set_l2_indirect_reg(reg_idx(IA_L2PMXEVTYPER, ctr), val);
+       kryo_l2_set_indirect_reg(reg_idx(IA_L2PMXEVTYPER, ctr), val);
 }
 
 static void cluster_pmu_set_resr(struct cluster_pmu *cluster,
@@ -295,11 +253,11 @@ static void cluster_pmu_set_resr(struct cluster_pmu *cluster,
 
        spin_lock_irqsave(&cluster->pmu_lock, flags);
 
-       resr_val = get_l2_indirect_reg(L2PMRESR);
+       resr_val = kryo_l2_get_indirect_reg(L2PMRESR);
        resr_val &= ~(L2PMRESR_GROUP_MASK << shift);
        resr_val |= field;
        resr_val |= L2PMRESR_EN;
-       set_l2_indirect_reg(L2PMRESR, resr_val);
+       kryo_l2_set_indirect_reg(L2PMRESR, resr_val);
 
        spin_unlock_irqrestore(&cluster->pmu_lock, flags);
 }
@@ -315,14 +273,14 @@ static inline void cluster_pmu_set_evfilter_sys_mode(u32 ctr)
                   L2PMXEVFILTER_ORGFILTER_IDINDEP |
                   L2PMXEVFILTER_ORGFILTER_ALL;
 
-       set_l2_indirect_reg(reg_idx(IA_L2PMXEVFILTER, ctr), val);
+       kryo_l2_set_indirect_reg(reg_idx(IA_L2PMXEVFILTER, ctr), val);
 }
 
 static inline u32 cluster_pmu_getreset_ovsr(void)
 {
-       u32 result = get_l2_indirect_reg(L2PMOVSSET);
+       u32 result = kryo_l2_get_indirect_reg(L2PMOVSSET);
 
-       set_l2_indirect_reg(L2PMOVSCLR, result);
+       kryo_l2_set_indirect_reg(L2PMOVSCLR, result);
        return result;
 }
 
@@ -767,7 +725,7 @@ static int get_num_counters(void)
 {
        int val;
 
-       val = get_l2_indirect_reg(L2PMCR);
+       val = kryo_l2_get_indirect_reg(L2PMCR);
 
        /*
         * Read number of counters from L2PMCR and add 1