drm/radeon: Fix backlight control on iMac 12,1

[linux-2.6-microblaze.git] / drivers / pci / pci.c

diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index f3f606c..9ecce43 100644 (file)
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -1115,7 +1115,7 @@ static int pci_raw_set_power_state(struct pci_dev *dev, pci_power_t state)
                return -EIO;
 
        pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr);
-       if (pmcsr == (u16) ~0) {
+       if (PCI_POSSIBLE_ERROR(pmcsr)) {
                pci_err(dev, "can't change power state from %s to %s (config space inaccessible)\n",
                        pci_power_name(dev->current_state),
                        pci_power_name(state));
@@ -1271,16 +1271,16 @@ static int pci_dev_wait(struct pci_dev *dev, char *reset_type, int timeout)
         * After reset, the device should not silently discard config
         * requests, but it may still indicate that it needs more time by
         * responding to them with CRS completions.  The Root Port will
-        * generally synthesize ~0 data to complete the read (except when
-        * CRS SV is enabled and the read was for the Vendor ID; in that
-        * case it synthesizes 0x0001 data).
+        * generally synthesize ~0 (PCI_ERROR_RESPONSE) data to complete
+        * the read (except when CRS SV is enabled and the read was for the
+        * Vendor ID; in that case it synthesizes 0x0001 data).
         *
         * Wait for the device to return a non-CRS completion.  Read the
         * Command register instead of Vendor ID so we don't have to
         * contend with the CRS SV value.
         */
        pci_read_config_dword(dev, PCI_COMMAND, &id);
-       while (id == ~0) {
+       while (PCI_POSSIBLE_ERROR(id)) {
                if (delay > timeout) {
                        pci_warn(dev, "not ready %dms after %s; giving up\n",
                                 delay - 1, reset_type);
@@ -1556,7 +1556,7 @@ static void pci_save_ltr_state(struct pci_dev *dev)
 {
        int ltr;
        struct pci_cap_saved_state *save_state;
-       u16 *cap;
+       u32 *cap;
 
        if (!pci_is_pcie(dev))
                return;
@@ -1571,25 +1571,25 @@ static void pci_save_ltr_state(struct pci_dev *dev)
                return;
        }
 
-       cap = (u16 *)&save_state->cap.data[0];
-       pci_read_config_word(dev, ltr + PCI_LTR_MAX_SNOOP_LAT, cap++);
-       pci_read_config_word(dev, ltr + PCI_LTR_MAX_NOSNOOP_LAT, cap++);
+       /* Some broken devices only support dword access to LTR */
+       cap = &save_state->cap.data[0];
+       pci_read_config_dword(dev, ltr + PCI_LTR_MAX_SNOOP_LAT, cap);
 }
 
 static void pci_restore_ltr_state(struct pci_dev *dev)
 {
        struct pci_cap_saved_state *save_state;
        int ltr;
-       u16 *cap;
+       u32 *cap;
 
        save_state = pci_find_saved_ext_cap(dev, PCI_EXT_CAP_ID_LTR);
        ltr = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_LTR);
        if (!save_state || !ltr)
                return;
 
-       cap = (u16 *)&save_state->cap.data[0];
-       pci_write_config_word(dev, ltr + PCI_LTR_MAX_SNOOP_LAT, *cap++);
-       pci_write_config_word(dev, ltr + PCI_LTR_MAX_NOSNOOP_LAT, *cap++);
+       /* Some broken devices only support dword access to LTR */
+       cap = &save_state->cap.data[0];
+       pci_write_config_dword(dev, ltr + PCI_LTR_MAX_SNOOP_LAT, *cap);
 }
 
 /**