Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net

[linux-2.6-microblaze.git] / drivers / net / ethernet / marvell / octeontx2 / af / rvu_reg.h

diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_reg.h b/drivers/net/ethernet/marvell/octeontx2/af/rvu_reg.h
index 1ea92a2..7ca599b 100644 (file)
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_reg.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_reg.h
@@ -246,6 +246,7 @@
 
 #define NIX_AF_DEBUG_NPC_RESP_DATAX(a)          (0x680 | (a) << 3)
 #define NIX_AF_SMQX_CFG(a)                      (0x700 | (a) << 16)
+#define NIX_AF_SQM_DBG_CTL_STATUS               (0x750)
 #define NIX_AF_PSE_CHANNEL_LEVEL                (0x800)
 #define NIX_AF_PSE_SHAPER_CFG                   (0x810)
 #define NIX_AF_TX_EXPR_CREDIT                  (0x830)
@@ -435,7 +436,6 @@
 #define CPT_AF_LF_RST                  (0x44000)
 #define CPT_AF_BLK_RST                 (0x46000)
 
-#define NDC_AF_BLK_RST                  (0x002F0)
 #define NPC_AF_BLK_RST                  (0x00040)
 
 /* NPC */
@@ -499,4 +499,30 @@
 #define NPC_AF_DBG_DATAX(a)            (0x3001400 | (a) << 4)
 #define NPC_AF_DBG_RESULTX(a)          (0x3001800 | (a) << 4)
 
+/* NDC */
+#define NDC_AF_CONST                   (0x00000)
+#define NDC_AF_CLK_EN                  (0x00020)
+#define NDC_AF_CTL                     (0x00030)
+#define NDC_AF_BANK_CTL                        (0x00040)
+#define NDC_AF_BANK_CTL_DONE           (0x00048)
+#define NDC_AF_INTR                    (0x00058)
+#define NDC_AF_INTR_W1S                        (0x00060)
+#define NDC_AF_INTR_ENA_W1S            (0x00068)
+#define NDC_AF_INTR_ENA_W1C            (0x00070)
+#define NDC_AF_ACTIVE_PC               (0x00078)
+#define NDC_AF_BP_TEST_ENABLE          (0x001F8)
+#define NDC_AF_BP_TEST(a)              (0x00200 | (a) << 3)
+#define NDC_AF_BLK_RST                 (0x002F0)
+#define NDC_PRIV_AF_INT_CFG            (0x002F8)
+#define NDC_AF_HASHX(a)                        (0x00300 | (a) << 3)
+#define NDC_AF_PORTX_RTX_RWX_REQ_PC(a, b, c) \
+               (0x00C00 | (a) << 5 | (b) << 4 | (c) << 3)
+#define NDC_AF_PORTX_RTX_RWX_OSTDN_PC(a, b, c) \
+               (0x00D00 | (a) << 5 | (b) << 4 | (c) << 3)
+#define NDC_AF_PORTX_RTX_RWX_LAT_PC(a, b, c) \
+               (0x00E00 | (a) << 5 | (b) << 4 | (c) << 3)
+#define NDC_AF_PORTX_RTX_CANT_ALLOC_PC(a, b) \
+               (0x00F00 | (a) << 5 | (b) << 4)
+#define NDC_AF_BANKX_HIT_PC(a)         (0x01000 | (a) << 3)
+#define NDC_AF_BANKX_MISS_PC(a)                (0x01100 | (a) << 3)
 #endif /* RVU_REG_H */