net: hns3: fix a -Wformat-nonliteral compile warning
[linux-2.6-microblaze.git] / drivers / net / ethernet / hisilicon / hns3 / hns3pf / hclge_err.h
index 9645590..7ea8bb2 100644 (file)
@@ -6,6 +6,11 @@
 
 #include "hclge_main.h"
 
+#define HCLGE_MPF_RAS_INT_MIN_BD_NUM   10
+#define HCLGE_PF_RAS_INT_MIN_BD_NUM    4
+#define HCLGE_MPF_MSIX_INT_MIN_BD_NUM  10
+#define HCLGE_PF_MSIX_INT_MIN_BD_NUM   4
+
 #define HCLGE_RAS_PF_OTHER_INT_STS_REG   0x20B00
 #define HCLGE_RAS_REG_NFE_MASK   0xFF00
 #define HCLGE_RAS_REG_ROCEE_ERR_MASK   0x3000000
@@ -47,9 +52,9 @@
 #define HCLGE_NCSI_ERR_INT_TYPE        0x9
 #define HCLGE_MAC_COMMON_ERR_INT_EN            0x107FF
 #define HCLGE_MAC_COMMON_ERR_INT_EN_MASK       0x107FF
-#define HCLGE_MAC_TNL_INT_EN                   GENMASK(7, 0)
-#define HCLGE_MAC_TNL_INT_EN_MASK              GENMASK(7, 0)
-#define HCLGE_MAC_TNL_INT_CLR                  GENMASK(7, 0)
+#define HCLGE_MAC_TNL_INT_EN                   GENMASK(9, 0)
+#define HCLGE_MAC_TNL_INT_EN_MASK              GENMASK(9, 0)
+#define HCLGE_MAC_TNL_INT_CLR                  GENMASK(9, 0)
 #define HCLGE_PPU_MPF_ABNORMAL_INT0_EN         GENMASK(31, 0)
 #define HCLGE_PPU_MPF_ABNORMAL_INT0_EN_MASK    GENMASK(31, 0)
 #define HCLGE_PPU_MPF_ABNORMAL_INT1_EN         GENMASK(31, 0)
 #define HCLGE_IGU_EGU_TNL_INT_MASK     GENMASK(5, 0)
 #define HCLGE_PPP_MPF_INT_ST3_MASK     GENMASK(5, 0)
 #define HCLGE_PPU_MPF_INT_ST3_MASK     GENMASK(7, 0)
-#define HCLGE_PPU_MPF_INT_ST2_MSIX_MASK        GENMASK(29, 28)
+#define HCLGE_PPU_MPF_INT_ST2_MSIX_MASK        BIT(29)
 #define HCLGE_PPU_PF_INT_RAS_MASK      0x18
-#define HCLGE_PPU_PF_INT_MSIX_MASK     0x27
+#define HCLGE_PPU_PF_INT_MSIX_MASK     0x26
+#define HCLGE_PPU_PF_OVER_8BD_ERR_MASK 0x01
 #define HCLGE_QCN_FIFO_INT_MASK                GENMASK(17, 0)
 #define HCLGE_QCN_ECC_INT_MASK         GENMASK(21, 0)
 #define HCLGE_NCSI_ECC_INT_MASK                GENMASK(1, 0)
 #define HCLGE_ROCEE_RAS_CE_INT_EN_MASK         0x1
 #define HCLGE_ROCEE_RERR_INT_MASK              BIT(0)
 #define HCLGE_ROCEE_BERR_INT_MASK              BIT(1)
+#define HCLGE_ROCEE_AXI_ERR_INT_MASK           GENMASK(1, 0)
 #define HCLGE_ROCEE_ECC_INT_MASK               BIT(2)
 #define HCLGE_ROCEE_OVF_INT_MASK               BIT(3)
 #define HCLGE_ROCEE_OVF_ERR_INT_MASK           0x10000
@@ -119,7 +126,9 @@ struct hclge_hw_error {
 };
 
 int hclge_config_mac_tnl_int(struct hclge_dev *hdev, bool en);
-int hclge_hw_error_set_state(struct hclge_dev *hdev, bool state);
+int hclge_config_nic_hw_error(struct hclge_dev *hdev, bool state);
+int hclge_config_rocee_ras_interrupt(struct hclge_dev *hdev, bool en);
+void hclge_handle_all_hns_hw_errors(struct hnae3_ae_dev *ae_dev);
 pci_ers_result_t hclge_handle_hw_ras_error(struct hnae3_ae_dev *ae_dev);
 int hclge_handle_hw_msix_error(struct hclge_dev *hdev,
                               unsigned long *reset_requests);