mtd: rawnand: Use the new ECC engine type enumeration
[linux-2.6-microblaze.git] / drivers / mtd / nand / raw / mxc_nand.c
index a043d76..d4200eb 100644 (file)
@@ -669,7 +669,7 @@ static void mxc_nand_enable_hwecc_v1_v2(struct nand_chip *chip, bool enable)
        struct mxc_nand_host *host = nand_get_controller_data(chip);
        uint16_t config1;
 
-       if (chip->ecc.mode != NAND_ECC_HW)
+       if (chip->ecc.engine_type != NAND_ECC_ENGINE_TYPE_ON_HOST)
                return;
 
        config1 = readw(NFC_V1_V2_CONFIG1);
@@ -687,7 +687,7 @@ static void mxc_nand_enable_hwecc_v3(struct nand_chip *chip, bool enable)
        struct mxc_nand_host *host = nand_get_controller_data(chip);
        uint32_t config2;
 
-       if (chip->ecc.mode != NAND_ECC_HW)
+       if (chip->ecc.engine_type != NAND_ECC_ENGINE_TYPE_ON_HOST)
                return;
 
        config2 = readl(NFC_V3_CONFIG2);
@@ -1117,7 +1117,8 @@ static void preset_v1(struct mtd_info *mtd)
        struct mxc_nand_host *host = nand_get_controller_data(nand_chip);
        uint16_t config1 = 0;
 
-       if (nand_chip->ecc.mode == NAND_ECC_HW && mtd->writesize)
+       if (nand_chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_ON_HOST &&
+           mtd->writesize)
                config1 |= NFC_V1_V2_CONFIG1_ECC_EN;
 
        if (!host->devtype_data->irqpending_quirk)
@@ -1227,7 +1228,7 @@ static void preset_v2(struct mtd_info *mtd)
        if (mtd->writesize) {
                uint16_t pages_per_block = mtd->erasesize / mtd->writesize;
 
-               if (nand_chip->ecc.mode == NAND_ECC_HW)
+               if (nand_chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_ON_HOST)
                        config1 |= NFC_V1_V2_CONFIG1_ECC_EN;
 
                host->eccsize = get_eccsize(mtd);
@@ -1303,7 +1304,7 @@ static void preset_v3(struct mtd_info *mtd)
        }
 
        if (mtd->writesize) {
-               if (chip->ecc.mode == NAND_ECC_HW)
+               if (chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_ON_HOST)
                        config2 |= NFC_V3_CONFIG2_ECC_EN;
 
                config2 |= NFC_V3_CONFIG2_PPB(
@@ -1680,8 +1681,8 @@ static int mxcnd_attach_chip(struct nand_chip *chip)
        struct mxc_nand_host *host = nand_get_controller_data(chip);
        struct device *dev = mtd->dev.parent;
 
-       switch (chip->ecc.mode) {
-       case NAND_ECC_HW:
+       switch (chip->ecc.engine_type) {
+       case NAND_ECC_ENGINE_TYPE_ON_HOST:
                chip->ecc.read_page = mxc_nand_read_page;
                chip->ecc.read_page_raw = mxc_nand_read_page_raw;
                chip->ecc.read_oob = mxc_nand_read_oob;
@@ -1690,7 +1691,7 @@ static int mxcnd_attach_chip(struct nand_chip *chip)
                chip->ecc.write_oob = mxc_nand_write_oob;
                break;
 
-       case NAND_ECC_SOFT:
+       case NAND_ECC_ENGINE_TYPE_SOFT:
                break;
 
        default:
@@ -1728,7 +1729,7 @@ static int mxcnd_attach_chip(struct nand_chip *chip)
         */
        host->used_oobsize = min(mtd->oobsize, 218U);
 
-       if (chip->ecc.mode == NAND_ECC_HW) {
+       if (chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_ON_HOST) {
                if (is_imx21_nfc(host) || is_imx27_nfc(host))
                        chip->ecc.strength = 1;
                else
@@ -1843,10 +1844,10 @@ static int mxcnd_probe(struct platform_device *pdev)
        mtd_set_ooblayout(mtd, host->devtype_data->ooblayout);
 
        if (host->pdata.hw_ecc) {
-               this->ecc.mode = NAND_ECC_HW;
+               this->ecc.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
        } else {
-               this->ecc.mode = NAND_ECC_SOFT;
-               this->ecc.algo = NAND_ECC_HAMMING;
+               this->ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
+               this->ecc.algo = NAND_ECC_ALGO_HAMMING;
        }
 
        /* NAND bus width determines access functions used by upper layer */