Merge tag 'v5.7-rc7' into perf/core, to pick up fixes
[linux-2.6-microblaze.git] / drivers / mmc / host / sdhci-msm.c
index 3955fa5..a8bcb3f 100644 (file)
@@ -977,9 +977,21 @@ static int sdhci_msm_cm_dll_sdc4_calibration(struct sdhci_host *host)
                goto out;
        }
 
-       config = readl_relaxed(host->ioaddr + msm_offset->core_vendor_spec3);
-       config |= CORE_PWRSAVE_DLL;
-       writel_relaxed(config, host->ioaddr + msm_offset->core_vendor_spec3);
+       /*
+        * Set CORE_PWRSAVE_DLL bit in CORE_VENDOR_SPEC3.
+        * When MCLK is gated OFF, it is not gated for less than 0.5us
+        * and MCLK must be switched on for at-least 1us before DATA
+        * starts coming. Controllers with 14lpp and later tech DLL cannot
+        * guarantee above requirement. So PWRSAVE_DLL should not be
+        * turned on for host controllers using this DLL.
+        */
+       if (!msm_host->use_14lpp_dll_reset) {
+               config = readl_relaxed(host->ioaddr +
+                               msm_offset->core_vendor_spec3);
+               config |= CORE_PWRSAVE_DLL;
+               writel_relaxed(config, host->ioaddr +
+                               msm_offset->core_vendor_spec3);
+       }
 
        /*
         * Drain writebuffer to ensure above DLL calibration
@@ -1811,6 +1823,13 @@ static void sdhci_msm_set_regulator_caps(struct sdhci_msm_host *msm_host)
        pr_debug("%s: supported caps: 0x%08x\n", mmc_hostname(mmc), caps);
 }
 
+static void sdhci_msm_reset(struct sdhci_host *host, u8 mask)
+{
+       if ((host->mmc->caps2 & MMC_CAP2_CQE) && (mask & SDHCI_RESET_ALL))
+               cqhci_deactivate(host->mmc);
+       sdhci_reset(host, mask);
+}
+
 static const struct sdhci_msm_variant_ops mci_var_ops = {
        .msm_readl_relaxed = sdhci_msm_mci_variant_readl_relaxed,
        .msm_writel_relaxed = sdhci_msm_mci_variant_writel_relaxed,
@@ -1849,7 +1868,7 @@ static const struct of_device_id sdhci_msm_dt_match[] = {
 MODULE_DEVICE_TABLE(of, sdhci_msm_dt_match);
 
 static const struct sdhci_ops sdhci_msm_ops = {
-       .reset = sdhci_reset,
+       .reset = sdhci_msm_reset,
        .set_clock = sdhci_msm_set_clock,
        .get_min_clock = sdhci_msm_get_min_clock,
        .get_max_clock = sdhci_msm_get_max_clock,
@@ -2068,6 +2087,8 @@ static int sdhci_msm_probe(struct platform_device *pdev)
                goto clk_disable;
        }
 
+       msm_host->mmc->caps |= MMC_CAP_WAIT_WHILE_BUSY | MMC_CAP_NEED_RSP_BUSY;
+
        pm_runtime_get_noresume(&pdev->dev);
        pm_runtime_set_active(&pdev->dev);
        pm_runtime_enable(&pdev->dev);