habanalabs: move driver to accel subsystem
[linux-2.6-microblaze.git] / drivers / misc / habanalabs / include / gaudi2 / asic_reg / dcore0_vdec0_brdg_ctrl_axuser_msix_nrm_regs.h
diff --git a/drivers/misc/habanalabs/include/gaudi2/asic_reg/dcore0_vdec0_brdg_ctrl_axuser_msix_nrm_regs.h b/drivers/misc/habanalabs/include/gaudi2/asic_reg/dcore0_vdec0_brdg_ctrl_axuser_msix_nrm_regs.h
deleted file mode 100644 (file)
index e413905..0000000
+++ /dev/null
@@ -1,61 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0
- *
- * Copyright 2016-2020 HabanaLabs, Ltd.
- * All Rights Reserved.
- *
- */
-
-/************************************
- ** This is an auto-generated file **
- **       DO NOT EDIT BELOW        **
- ************************************/
-
-#ifndef ASIC_REG_DCORE0_VDEC0_BRDG_CTRL_AXUSER_MSIX_NRM_REGS_H_
-#define ASIC_REG_DCORE0_VDEC0_BRDG_CTRL_AXUSER_MSIX_NRM_REGS_H_
-
-/*
- *****************************************
- *   DCORE0_VDEC0_BRDG_CTRL_AXUSER_MSIX_NRM
- *   (Prototype: AXUSER)
- *****************************************
- */
-
-#define mmDCORE0_VDEC0_BRDG_CTRL_AXUSER_MSIX_NRM_HB_ASID 0x41E3A00
-
-#define mmDCORE0_VDEC0_BRDG_CTRL_AXUSER_MSIX_NRM_HB_MMU_BP 0x41E3A04
-
-#define mmDCORE0_VDEC0_BRDG_CTRL_AXUSER_MSIX_NRM_HB_STRONG_ORDER 0x41E3A08
-
-#define mmDCORE0_VDEC0_BRDG_CTRL_AXUSER_MSIX_NRM_HB_NO_SNOOP 0x41E3A0C
-
-#define mmDCORE0_VDEC0_BRDG_CTRL_AXUSER_MSIX_NRM_HB_WR_REDUCTION 0x41E3A10
-
-#define mmDCORE0_VDEC0_BRDG_CTRL_AXUSER_MSIX_NRM_HB_RD_ATOMIC 0x41E3A14
-
-#define mmDCORE0_VDEC0_BRDG_CTRL_AXUSER_MSIX_NRM_HB_QOS 0x41E3A18
-
-#define mmDCORE0_VDEC0_BRDG_CTRL_AXUSER_MSIX_NRM_HB_RSVD 0x41E3A1C
-
-#define mmDCORE0_VDEC0_BRDG_CTRL_AXUSER_MSIX_NRM_HB_EMEM_CPAGE 0x41E3A20
-
-#define mmDCORE0_VDEC0_BRDG_CTRL_AXUSER_MSIX_NRM_HB_CORE 0x41E3A24
-
-#define mmDCORE0_VDEC0_BRDG_CTRL_AXUSER_MSIX_NRM_E2E_COORD 0x41E3A28
-
-#define mmDCORE0_VDEC0_BRDG_CTRL_AXUSER_MSIX_NRM_HB_WR_OVRD_LO 0x41E3A30
-
-#define mmDCORE0_VDEC0_BRDG_CTRL_AXUSER_MSIX_NRM_HB_WR_OVRD_HI 0x41E3A34
-
-#define mmDCORE0_VDEC0_BRDG_CTRL_AXUSER_MSIX_NRM_HB_RD_OVRD_LO 0x41E3A38
-
-#define mmDCORE0_VDEC0_BRDG_CTRL_AXUSER_MSIX_NRM_HB_RD_OVRD_HI 0x41E3A3C
-
-#define mmDCORE0_VDEC0_BRDG_CTRL_AXUSER_MSIX_NRM_LB_COORD 0x41E3A40
-
-#define mmDCORE0_VDEC0_BRDG_CTRL_AXUSER_MSIX_NRM_LB_LOCK 0x41E3A44
-
-#define mmDCORE0_VDEC0_BRDG_CTRL_AXUSER_MSIX_NRM_LB_RSVD 0x41E3A48
-
-#define mmDCORE0_VDEC0_BRDG_CTRL_AXUSER_MSIX_NRM_LB_OVRD 0x41E3A4C
-
-#endif /* ASIC_REG_DCORE0_VDEC0_BRDG_CTRL_AXUSER_MSIX_NRM_REGS_H_ */