+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0
- *
- * Copyright 2016-2020 HabanaLabs, Ltd.
- * All Rights Reserved.
- *
- */
-
-/************************************
- ** This is an auto-generated file **
- ** DO NOT EDIT BELOW **
- ************************************/
-
-#ifndef ASIC_REG_DCORE0_MME_CTRL_LO_REGS_H_
-#define ASIC_REG_DCORE0_MME_CTRL_LO_REGS_H_
-
-/*
- *****************************************
- * DCORE0_MME_CTRL_LO
- * (Prototype: MME_CTRL_LO)
- *****************************************
- */
-
-#define mmDCORE0_MME_CTRL_LO_ARCH_STATUS 0x40CB000
-
-#define mmDCORE0_MME_CTRL_LO_CMD 0x40CB004
-
-#define mmDCORE0_MME_CTRL_LO_ARCH_SYNC_OBJ_DW0 0x40CB148
-
-#define mmDCORE0_MME_CTRL_LO_ARCH_SYNC_OBJ_ADDR0 0x40CB14C
-
-#define mmDCORE0_MME_CTRL_LO_ARCH_SYNC_OBJ_VAL0 0x40CB150
-
-#define mmDCORE0_MME_CTRL_LO_ARCH_SYNC_OBJ_ADDR1 0x40CB154
-
-#define mmDCORE0_MME_CTRL_LO_ARCH_SYNC_OBJ_VAL1 0x40CB158
-
-#define mmDCORE0_MME_CTRL_LO_ARCH_A_SS 0x40CB224
-
-#define mmDCORE0_MME_CTRL_LO_ARCH_B_SS 0x40CB228
-
-#define mmDCORE0_MME_CTRL_LO_ARCH_COUT_SS 0x40CB27C
-
-#define mmDCORE0_MME_CTRL_LO_QM_STALL 0x40CB400
-
-#define mmDCORE0_MME_CTRL_LO_LOG_SHADOW_LO 0x40CB404
-
-#define mmDCORE0_MME_CTRL_LO_LOG_SHADOW_HI 0x40CB408
-
-#define mmDCORE0_MME_CTRL_LO_SYNC_OBJECT_FIFO_TH 0x40CB40C
-
-#define mmDCORE0_MME_CTRL_LO_REDUN 0x40CB410
-
-#define mmDCORE0_MME_CTRL_LO_EUS_LOCAL_FIFO_TH 0x40CB414
-
-#define mmDCORE0_MME_CTRL_LO_EUS_ROLLUP_DLY_DW0 0x40CB418
-
-#define mmDCORE0_MME_CTRL_LO_EUS_ROLLUP_DLY_DW1 0x40CB41C
-
-#define mmDCORE0_MME_CTRL_LO_EUS_ROLLUP_CD_PROT_F16 0x40CB420
-
-#define mmDCORE0_MME_CTRL_LO_EUS_ROLLUP_CD_PROT_F8 0x40CB424
-
-#define mmDCORE0_MME_CTRL_LO_EUS_ROLLUP_CD_PROT_FP32 0x40CB428
-
-#define mmDCORE0_MME_CTRL_LO_EUS_ROLLUP_CD_PROT_FP32I 0x40CB42C
-
-#define mmDCORE0_MME_CTRL_LO_EUS_ROLLUP_CD_PROT_TF32 0x40CB430
-
-#define mmDCORE0_MME_CTRL_LO_PCU_RL_DESC0 0x40CB434
-
-#define mmDCORE0_MME_CTRL_LO_PCU_RL_TOKEN_UPDATE 0x40CB438
-
-#define mmDCORE0_MME_CTRL_LO_PCU_RL_TH 0x40CB43C
-
-#define mmDCORE0_MME_CTRL_LO_PCU_RL_MIN 0x40CB440
-
-#define mmDCORE0_MME_CTRL_LO_PCU_RL_CTRL_EN 0x40CB444
-
-#define mmDCORE0_MME_CTRL_LO_PCU_RL_HISTORY_LOG_SIZE 0x40CB448
-
-#define mmDCORE0_MME_CTRL_LO_PCU_DUMMY_A_BF16 0x40CB44C
-
-#define mmDCORE0_MME_CTRL_LO_PCU_DUMMY_B_BF16 0x40CB450
-
-#define mmDCORE0_MME_CTRL_LO_PCU_DUMMY_A_FP16 0x40CB454
-
-#define mmDCORE0_MME_CTRL_LO_PCU_DUMMY_B_FP16 0x40CB458
-
-#define mmDCORE0_MME_CTRL_LO_PCU_DUMMY_F8 0x40CB45C
-
-#define mmDCORE0_MME_CTRL_LO_PCU_DUMMY_A_FP32_ODD 0x40CB460
-
-#define mmDCORE0_MME_CTRL_LO_PCU_DUMMY_A_FP32_EVEN 0x40CB464
-
-#define mmDCORE0_MME_CTRL_LO_PCU_DUMMY_B_FP32_ODD 0x40CB468
-
-#define mmDCORE0_MME_CTRL_LO_PCU_DUMMY_B_FP32_EVEN 0x40CB46C
-
-#define mmDCORE0_MME_CTRL_LO_PCU_DUMMY_A_TF32_ODD 0x40CB470
-
-#define mmDCORE0_MME_CTRL_LO_PCU_DUMMY_A_TF32_EVEN 0x40CB474
-
-#define mmDCORE0_MME_CTRL_LO_PCU_DUMMY_B_TF32_ODD 0x40CB478
-
-#define mmDCORE0_MME_CTRL_LO_PCU_DUMMY_B_TF32_EVEN 0x40CB47C
-
-#define mmDCORE0_MME_CTRL_LO_PROT 0x40CB480
-
-#define mmDCORE0_MME_CTRL_LO_EU 0x40CB484
-
-#define mmDCORE0_MME_CTRL_LO_SBTE 0x40CB488
-
-#define mmDCORE0_MME_CTRL_LO_AGU_SM_INFLIGHT_CNTR 0x40CB48C
-
-#define mmDCORE0_MME_CTRL_LO_AGU_SM_TOTAL_CNTR 0x40CB490
-
-#define mmDCORE0_MME_CTRL_LO_PCU_RL_SAT_SEC 0x40CB494
-
-#define mmDCORE0_MME_CTRL_LO_FMA_FUNC_REDUN_CLK_EN32 0x40CB498
-
-#define mmDCORE0_MME_CTRL_LO_FMA_FUNC_REDUN_CLK_EN33 0x40CB49C
-
-#define mmDCORE0_MME_CTRL_LO_EU_ISOLATION_DIS 0x40CB4A0
-
-#define mmDCORE0_MME_CTRL_LO_QM_SLV_CLK_EN 0x40CB4A4
-
-#define mmDCORE0_MME_CTRL_LO_HBW_CLK_ENABLER_DIS 0x40CB4A8
-
-#define mmDCORE0_MME_CTRL_LO_AGU 0x40CB4AC
-
-#define mmDCORE0_MME_CTRL_LO_QM 0x40CB4B0
-
-#define mmDCORE0_MME_CTRL_LO_EARLY_RELEASE_STATUS 0x40CB4B4
-
-#define mmDCORE0_MME_CTRL_LO_INTR_CAUSE 0x40CB4B8
-
-#define mmDCORE0_MME_CTRL_LO_INTR_MASK 0x40CB4BC
-
-#define mmDCORE0_MME_CTRL_LO_INTR_CLEAR 0x40CB4C0
-
-#define mmDCORE0_MME_CTRL_LO_REDUN_PSOC_SEL_SEC 0x40CB4C4
-
-#define mmDCORE0_MME_CTRL_LO_BIST 0x40CB4C8
-
-#define mmDCORE0_MME_CTRL_LO_EU_RL_ENABLE 0x40CB4CC
-
-#define mmDCORE0_MME_CTRL_LO_EU_RL_TOKEN_SEL 0x40CB4D0
-
-#define mmDCORE0_MME_CTRL_LO_EU_RL_CFG 0x40CB4D4
-
-#define mmDCORE0_MME_CTRL_LO_PCU_DBG_DW0 0x40CB4D8
-
-#define mmDCORE0_MME_CTRL_LO_PCU_DBG_DW1 0x40CB4DC
-
-#define mmDCORE0_MME_CTRL_LO_PCU_DBG_DW2 0x40CB4E0
-
-#define mmDCORE0_MME_CTRL_LO_PCU_DBG_DW3 0x40CB4E4
-
-#define mmDCORE0_MME_CTRL_LO_PCU_DBG_WKL_ID 0x40CB4E8
-
-#define mmDCORE0_MME_CTRL_LO_ETF_MEM_WRAP_RM 0x40CB4EC
-
-#endif /* ASIC_REG_DCORE0_MME_CTRL_LO_REGS_H_ */
projects / linux-2.6-microblaze.git / blobdiff