habanalabs: move driver to accel subsystem
[linux-2.6-microblaze.git] / drivers / misc / habanalabs / include / gaudi / asic_reg / sif_rtr_ctrl_7_regs.h
diff --git a/drivers/misc/habanalabs/include/gaudi/asic_reg/sif_rtr_ctrl_7_regs.h b/drivers/misc/habanalabs/include/gaudi/asic_reg/sif_rtr_ctrl_7_regs.h
deleted file mode 100644 (file)
index a37772c..0000000
+++ /dev/null
@@ -1,896 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0
- *
- * Copyright 2016-2018 HabanaLabs, Ltd.
- * All Rights Reserved.
- *
- */
-
-/************************************
- ** This is an auto-generated file **
- **       DO NOT EDIT BELOW        **
- ************************************/
-
-#ifndef ASIC_REG_SIF_RTR_CTRL_7_REGS_H_
-#define ASIC_REG_SIF_RTR_CTRL_7_REGS_H_
-
-/*
- *****************************************
- *   SIF_RTR_CTRL_7 (Prototype: RTR_CTRL)
- *****************************************
- */
-
-#define mmSIF_RTR_CTRL_7_PERM_SEL                                    0x376108
-
-#define mmSIF_RTR_CTRL_7_HBM_POLY_H3_0                               0x376114
-
-#define mmSIF_RTR_CTRL_7_HBM_POLY_H3_1                               0x376118
-
-#define mmSIF_RTR_CTRL_7_HBM_POLY_H3_2                               0x37611C
-
-#define mmSIF_RTR_CTRL_7_HBM_POLY_H3_3                               0x376120
-
-#define mmSIF_RTR_CTRL_7_HBM_POLY_H3_4                               0x376124
-
-#define mmSIF_RTR_CTRL_7_HBM_POLY_H3_5                               0x376128
-
-#define mmSIF_RTR_CTRL_7_HBM_POLY_H3_6                               0x37612C
-
-#define mmSIF_RTR_CTRL_7_HBM_POLY_H3_7                               0x376130
-
-#define mmSIF_RTR_CTRL_7_HBM_POLY_H3_8                               0x376134
-
-#define mmSIF_RTR_CTRL_7_HBM_POLY_H3_9                               0x376138
-
-#define mmSIF_RTR_CTRL_7_HBM_POLY_H3_10                              0x37613C
-
-#define mmSIF_RTR_CTRL_7_HBM_POLY_H3_11                              0x376140
-
-#define mmSIF_RTR_CTRL_7_HBM_POLY_H3_12                              0x376144
-
-#define mmSIF_RTR_CTRL_7_HBM_POLY_H3_13                              0x376148
-
-#define mmSIF_RTR_CTRL_7_HBM_POLY_H3_14                              0x37614C
-
-#define mmSIF_RTR_CTRL_7_HBM_POLY_H3_15                              0x376150
-
-#define mmSIF_RTR_CTRL_7_HBM_POLY_H3_16                              0x376154
-
-#define mmSIF_RTR_CTRL_7_HBM_POLY_H3_17                              0x376158
-
-#define mmSIF_RTR_CTRL_7_HBM_POLY_H3_18                              0x37615C
-
-#define mmSIF_RTR_CTRL_7_HBM_POLY_H3_19                              0x376160
-
-#define mmSIF_RTR_CTRL_7_HBM_POLY_H3_20                              0x376164
-
-#define mmSIF_RTR_CTRL_7_HBM_POLY_H3_21                              0x376168
-
-#define mmSIF_RTR_CTRL_7_HBM_POLY_H3_22                              0x37616C
-
-#define mmSIF_RTR_CTRL_7_HBM_POLY_H3_23                              0x376170
-
-#define mmSIF_RTR_CTRL_7_HBM_POLY_H3_24                              0x376174
-
-#define mmSIF_RTR_CTRL_7_HBM_POLY_H3_25                              0x376178
-
-#define mmSIF_RTR_CTRL_7_HBM_POLY_H3_26                              0x37617C
-
-#define mmSIF_RTR_CTRL_7_HBM_POLY_H3_27                              0x376180
-
-#define mmSIF_RTR_CTRL_7_SRAM_POLY_H3_0                              0x376184
-
-#define mmSIF_RTR_CTRL_7_SRAM_POLY_H3_1                              0x376188
-
-#define mmSIF_RTR_CTRL_7_SRAM_POLY_H3_2                              0x37618C
-
-#define mmSIF_RTR_CTRL_7_SRAM_POLY_H3_3                              0x376190
-
-#define mmSIF_RTR_CTRL_7_SRAM_POLY_H3_4                              0x376194
-
-#define mmSIF_RTR_CTRL_7_SRAM_POLY_H3_5                              0x376198
-
-#define mmSIF_RTR_CTRL_7_SRAM_POLY_H3_6                              0x37619C
-
-#define mmSIF_RTR_CTRL_7_SRAM_POLY_H3_7                              0x3761A0
-
-#define mmSIF_RTR_CTRL_7_SRAM_POLY_H3_8                              0x3761A4
-
-#define mmSIF_RTR_CTRL_7_SRAM_POLY_H3_9                              0x3761A8
-
-#define mmSIF_RTR_CTRL_7_SRAM_POLY_H3_10                             0x3761AC
-
-#define mmSIF_RTR_CTRL_7_SRAM_POLY_H3_11                             0x3761B0
-
-#define mmSIF_RTR_CTRL_7_SRAM_POLY_H3_12                             0x3761B4
-
-#define mmSIF_RTR_CTRL_7_SRAM_POLY_H3_13                             0x3761B8
-
-#define mmSIF_RTR_CTRL_7_SRAM_POLY_H3_14                             0x3761BC
-
-#define mmSIF_RTR_CTRL_7_SCRAM_SRAM_EN                               0x37626C
-
-#define mmSIF_RTR_CTRL_7_RL_HBM_EN                                   0x376274
-
-#define mmSIF_RTR_CTRL_7_RL_HBM_SAT                                  0x376278
-
-#define mmSIF_RTR_CTRL_7_RL_HBM_RST                                  0x37627C
-
-#define mmSIF_RTR_CTRL_7_RL_HBM_TIMEOUT                              0x376280
-
-#define mmSIF_RTR_CTRL_7_SCRAM_HBM_EN                                0x376284
-
-#define mmSIF_RTR_CTRL_7_RL_PCI_EN                                   0x376288
-
-#define mmSIF_RTR_CTRL_7_RL_PCI_SAT                                  0x37628C
-
-#define mmSIF_RTR_CTRL_7_RL_PCI_RST                                  0x376290
-
-#define mmSIF_RTR_CTRL_7_RL_PCI_TIMEOUT                              0x376294
-
-#define mmSIF_RTR_CTRL_7_RL_SRAM_EN                                  0x37629C
-
-#define mmSIF_RTR_CTRL_7_RL_SRAM_SAT                                 0x3762A0
-
-#define mmSIF_RTR_CTRL_7_RL_SRAM_RST                                 0x3762A4
-
-#define mmSIF_RTR_CTRL_7_RL_SRAM_TIMEOUT                             0x3762AC
-
-#define mmSIF_RTR_CTRL_7_RL_SRAM_RED                                 0x3762B4
-
-#define mmSIF_RTR_CTRL_7_E2E_HBM_EN                                  0x3762EC
-
-#define mmSIF_RTR_CTRL_7_E2E_PCI_EN                                  0x3762F0
-
-#define mmSIF_RTR_CTRL_7_E2E_HBM_WR_SIZE                             0x3762F4
-
-#define mmSIF_RTR_CTRL_7_E2E_PCI_WR_SIZE                             0x3762F8
-
-#define mmSIF_RTR_CTRL_7_E2E_AW_PCI_CTR_SET_EN                       0x376404
-
-#define mmSIF_RTR_CTRL_7_E2E_AW_PCI_CTR_SET                          0x376408
-
-#define mmSIF_RTR_CTRL_7_E2E_AW_PCI_CTR_WRAP                         0x37640C
-
-#define mmSIF_RTR_CTRL_7_E2E_AW_PCI_CTR_CNT                          0x376410
-
-#define mmSIF_RTR_CTRL_7_E2E_AW_HBM_CTR_SET_EN                       0x376414
-
-#define mmSIF_RTR_CTRL_7_E2E_AW_HBM_CTR_SET                          0x376418
-
-#define mmSIF_RTR_CTRL_7_E2E_HBM_RD_SIZE                             0x37641C
-
-#define mmSIF_RTR_CTRL_7_E2E_PCI_RD_SIZE                             0x376420
-
-#define mmSIF_RTR_CTRL_7_E2E_AR_PCI_CTR_SET_EN                       0x376424
-
-#define mmSIF_RTR_CTRL_7_E2E_AR_PCI_CTR_SET                          0x376428
-
-#define mmSIF_RTR_CTRL_7_E2E_AR_PCI_CTR_WRAP                         0x37642C
-
-#define mmSIF_RTR_CTRL_7_E2E_AR_PCI_CTR_CNT                          0x376430
-
-#define mmSIF_RTR_CTRL_7_E2E_AR_HBM_CTR_SET_EN                       0x376434
-
-#define mmSIF_RTR_CTRL_7_E2E_AR_HBM_CTR_SET                          0x376438
-
-#define mmSIF_RTR_CTRL_7_NL_HBM_SEL_0                                0x376450
-
-#define mmSIF_RTR_CTRL_7_NL_HBM_SEL_1                                0x376454
-
-#define mmSIF_RTR_CTRL_7_NON_LIN_EN                                  0x376480
-
-#define mmSIF_RTR_CTRL_7_NL_SRAM_BANK_0                              0x376500
-
-#define mmSIF_RTR_CTRL_7_NL_SRAM_BANK_1                              0x376504
-
-#define mmSIF_RTR_CTRL_7_NL_SRAM_BANK_2                              0x376508
-
-#define mmSIF_RTR_CTRL_7_NL_SRAM_BANK_3                              0x37650C
-
-#define mmSIF_RTR_CTRL_7_NL_SRAM_BANK_4                              0x376510
-
-#define mmSIF_RTR_CTRL_7_NL_SRAM_OFFSET_0                            0x376514
-
-#define mmSIF_RTR_CTRL_7_NL_SRAM_OFFSET_1                            0x376520
-
-#define mmSIF_RTR_CTRL_7_NL_SRAM_OFFSET_2                            0x376524
-
-#define mmSIF_RTR_CTRL_7_NL_SRAM_OFFSET_3                            0x376528
-
-#define mmSIF_RTR_CTRL_7_NL_SRAM_OFFSET_4                            0x37652C
-
-#define mmSIF_RTR_CTRL_7_NL_SRAM_OFFSET_5                            0x376530
-
-#define mmSIF_RTR_CTRL_7_NL_SRAM_OFFSET_6                            0x376534
-
-#define mmSIF_RTR_CTRL_7_NL_SRAM_OFFSET_7                            0x376538
-
-#define mmSIF_RTR_CTRL_7_NL_SRAM_OFFSET_8                            0x37653C
-
-#define mmSIF_RTR_CTRL_7_NL_SRAM_OFFSET_9                            0x376540
-
-#define mmSIF_RTR_CTRL_7_NL_HBM_OFFSET_0                             0x376550
-
-#define mmSIF_RTR_CTRL_7_NL_HBM_OFFSET_1                             0x376554
-
-#define mmSIF_RTR_CTRL_7_NL_HBM_OFFSET_2                             0x376558
-
-#define mmSIF_RTR_CTRL_7_NL_HBM_OFFSET_3                             0x37655C
-
-#define mmSIF_RTR_CTRL_7_NL_HBM_OFFSET_4                             0x376560
-
-#define mmSIF_RTR_CTRL_7_NL_HBM_OFFSET_5                             0x376564
-
-#define mmSIF_RTR_CTRL_7_NL_HBM_OFFSET_6                             0x376568
-
-#define mmSIF_RTR_CTRL_7_NL_HBM_OFFSET_7                             0x37656C
-
-#define mmSIF_RTR_CTRL_7_NL_HBM_OFFSET_8                             0x376570
-
-#define mmSIF_RTR_CTRL_7_NL_HBM_OFFSET_9                             0x376574
-
-#define mmSIF_RTR_CTRL_7_NL_HBM_OFFSET_10                            0x376578
-
-#define mmSIF_RTR_CTRL_7_NL_HBM_OFFSET_11                            0x37657C
-
-#define mmSIF_RTR_CTRL_7_NL_HBM_OFFSET_12                            0x376580
-
-#define mmSIF_RTR_CTRL_7_NL_HBM_OFFSET_13                            0x376584
-
-#define mmSIF_RTR_CTRL_7_NL_HBM_OFFSET_14                            0x376588
-
-#define mmSIF_RTR_CTRL_7_NL_HBM_OFFSET_15                            0x37658C
-
-#define mmSIF_RTR_CTRL_7_NL_HBM_OFFSET_16                            0x376590
-
-#define mmSIF_RTR_CTRL_7_NL_HBM_OFFSET_17                            0x376594
-
-#define mmSIF_RTR_CTRL_7_NL_HBM_OFFSET_18                            0x376598
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AW_0                     0x3765E4
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AW_1                     0x3765E8
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AW_2                     0x3765EC
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AW_3                     0x3765F0
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AW_4                     0x3765F4
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AW_5                     0x3765F8
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AW_6                     0x3765FC
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AW_7                     0x376600
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AW_8                     0x376604
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AW_9                     0x376608
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AW_10                    0x37660C
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AW_11                    0x376610
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AW_12                    0x376614
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AW_13                    0x376618
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AW_14                    0x37661C
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AW_15                    0x376620
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AW_0                    0x376624
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AW_1                    0x376628
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AW_2                    0x37662C
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AW_3                    0x376630
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AW_4                    0x376634
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AW_5                    0x376638
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AW_6                    0x37663C
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AW_7                    0x376640
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AW_8                    0x376644
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AW_9                    0x376648
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AW_10                   0x37664C
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AW_11                   0x376650
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AW_12                   0x376654
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AW_13                   0x376658
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AW_14                   0x37665C
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AW_15                   0x376660
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AW_0                     0x376664
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AW_1                     0x376668
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AW_2                     0x37666C
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AW_3                     0x376670
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AW_4                     0x376674
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AW_5                     0x376678
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AW_6                     0x37667C
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AW_7                     0x376680
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AW_8                     0x376684
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AW_9                     0x376688
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AW_10                    0x37668C
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AW_11                    0x376690
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AW_12                    0x376694
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AW_13                    0x376698
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AW_14                    0x37669C
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AW_15                    0x3766A0
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AW_0                    0x3766A4
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AW_1                    0x3766A8
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AW_2                    0x3766AC
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AW_3                    0x3766B0
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AW_4                    0x3766B4
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AW_5                    0x3766B8
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AW_6                    0x3766BC
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AW_7                    0x3766C0
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AW_8                    0x3766C4
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AW_9                    0x3766C8
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AW_10                   0x3766CC
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AW_11                   0x3766D0
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AW_12                   0x3766D4
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AW_13                   0x3766D8
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AW_14                   0x3766DC
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AW_15                   0x3766E0
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AW_0                    0x3766E4
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AW_1                    0x3766E8
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AW_2                    0x3766EC
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AW_3                    0x3766F0
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AW_4                    0x3766F4
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AW_5                    0x3766F8
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AW_6                    0x3766FC
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AW_7                    0x376700
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AW_8                    0x376704
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AW_9                    0x376708
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AW_10                   0x37670C
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AW_11                   0x376710
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AW_12                   0x376714
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AW_13                   0x376718
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AW_14                   0x37671C
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AW_15                   0x376720
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AW_0                   0x376724
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AW_1                   0x376728
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AW_2                   0x37672C
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AW_3                   0x376730
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AW_4                   0x376734
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AW_5                   0x376738
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AW_6                   0x37673C
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AW_7                   0x376740
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AW_8                   0x376744
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AW_9                   0x376748
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AW_10                  0x37674C
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AW_11                  0x376750
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AW_12                  0x376754
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AW_13                  0x376758
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AW_14                  0x37675C
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AW_15                  0x376760
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AW_0                    0x376764
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AW_1                    0x376768
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AW_2                    0x37676C
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AW_3                    0x376770
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AW_4                    0x376774
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AW_5                    0x376778
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AW_6                    0x37677C
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AW_7                    0x376780
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AW_8                    0x376784
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AW_9                    0x376788
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AW_10                   0x37678C
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AW_11                   0x376790
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AW_12                   0x376794
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AW_13                   0x376798
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AW_14                   0x37679C
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AW_15                   0x3767A0
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AW_0                   0x3767A4
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AW_1                   0x3767A8
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AW_2                   0x3767AC
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AW_3                   0x3767B0
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AW_4                   0x3767B4
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AW_5                   0x3767B8
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AW_6                   0x3767BC
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AW_7                   0x3767C0
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AW_8                   0x3767C4
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AW_9                   0x3767C8
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AW_10                  0x3767CC
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AW_11                  0x3767D0
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AW_12                  0x3767D4
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AW_13                  0x3767D8
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AW_14                  0x3767DC
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AW_15                  0x3767E0
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AR_0                     0x376824
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AR_1                     0x376828
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AR_2                     0x37682C
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AR_3                     0x376830
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AR_4                     0x376834
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AR_5                     0x376838
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AR_6                     0x37683C
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AR_7                     0x376840
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AR_8                     0x376844
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AR_9                     0x376848
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AR_10                    0x37684C
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AR_11                    0x376850
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AR_12                    0x376854
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AR_13                    0x376858
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AR_14                    0x37685C
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AR_15                    0x376860
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AR_0                    0x376864
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AR_1                    0x376868
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AR_2                    0x37686C
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AR_3                    0x376870
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AR_4                    0x376874
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AR_5                    0x376878
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AR_6                    0x37687C
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AR_7                    0x376880
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AR_8                    0x376884
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AR_9                    0x376888
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AR_10                   0x37688C
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AR_11                   0x376890
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AR_12                   0x376894
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AR_13                   0x376898
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AR_14                   0x37689C
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AR_15                   0x3768A0
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AR_0                     0x3768A4
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AR_1                     0x3768A8
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AR_2                     0x3768AC
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AR_3                     0x3768B0
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AR_4                     0x3768B4
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AR_5                     0x3768B8
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AR_6                     0x3768BC
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AR_7                     0x3768C0
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AR_8                     0x3768C4
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AR_9                     0x3768C8
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AR_10                    0x3768CC
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AR_11                    0x3768D0
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AR_12                    0x3768D4
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AR_13                    0x3768D8
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AR_14                    0x3768DC
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AR_15                    0x3768E0
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AR_0                    0x3768E4
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AR_1                    0x3768E8
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AR_2                    0x3768EC
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AR_3                    0x3768F0
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AR_4                    0x3768F4
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AR_5                    0x3768F8
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AR_6                    0x3768FC
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AR_7                    0x376900
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AR_8                    0x376904
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AR_9                    0x376908
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AR_10                   0x37690C
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AR_11                   0x376910
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AR_12                   0x376914
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AR_13                   0x376918
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AR_14                   0x37691C
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AR_15                   0x376920
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AR_0                    0x376924
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AR_1                    0x376928
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AR_2                    0x37692C
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AR_3                    0x376930
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AR_4                    0x376934
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AR_5                    0x376938
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AR_6                    0x37693C
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AR_7                    0x376940
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AR_8                    0x376944
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AR_9                    0x376948
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AR_10                   0x37694C
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AR_11                   0x376950
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AR_12                   0x376954
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AR_13                   0x376958
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AR_14                   0x37695C
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AR_15                   0x376960
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AR_0                   0x376964
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AR_1                   0x376968
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AR_2                   0x37696C
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AR_3                   0x376970
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AR_4                   0x376974
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AR_5                   0x376978
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AR_6                   0x37697C
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AR_7                   0x376980
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AR_8                   0x376984
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AR_9                   0x376988
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AR_10                  0x37698C
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AR_11                  0x376990
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AR_12                  0x376994
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AR_13                  0x376998
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AR_14                  0x37699C
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AR_15                  0x3769A0
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AR_0                    0x3769A4
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AR_1                    0x3769A8
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AR_2                    0x3769AC
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AR_3                    0x3769B0
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AR_4                    0x3769B4
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AR_5                    0x3769B8
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AR_6                    0x3769BC
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AR_7                    0x3769C0
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AR_8                    0x3769C4
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AR_9                    0x3769C8
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AR_10                   0x3769CC
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AR_11                   0x3769D0
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AR_12                   0x3769D4
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AR_13                   0x3769D8
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AR_14                   0x3769DC
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AR_15                   0x3769E0
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AR_0                   0x3769E4
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AR_1                   0x3769E8
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AR_2                   0x3769EC
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AR_3                   0x3769F0
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AR_4                   0x3769F4
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AR_5                   0x3769F8
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AR_6                   0x3769FC
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AR_7                   0x376A00
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AR_8                   0x376A04
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AR_9                   0x376A08
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AR_10                  0x376A0C
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AR_11                  0x376A10
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AR_12                  0x376A14
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AR_13                  0x376A18
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AR_14                  0x376A1C
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AR_15                  0x376A20
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_HIT_AW                            0x376A64
-
-#define mmSIF_RTR_CTRL_7_RANGE_SEC_HIT_AR                            0x376A68
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_HIT_AW                           0x376A6C
-
-#define mmSIF_RTR_CTRL_7_RANGE_PRIV_HIT_AR                           0x376A70
-
-#define mmSIF_RTR_CTRL_7_RGL_CFG                                     0x376B64
-
-#define mmSIF_RTR_CTRL_7_RGL_SHIFT                                   0x376B68
-
-#define mmSIF_RTR_CTRL_7_RGL_EXPECTED_LAT_0                          0x376B6C
-
-#define mmSIF_RTR_CTRL_7_RGL_EXPECTED_LAT_1                          0x376B70
-
-#define mmSIF_RTR_CTRL_7_RGL_EXPECTED_LAT_2                          0x376B74
-
-#define mmSIF_RTR_CTRL_7_RGL_EXPECTED_LAT_3                          0x376B78
-
-#define mmSIF_RTR_CTRL_7_RGL_EXPECTED_LAT_4                          0x376B7C
-
-#define mmSIF_RTR_CTRL_7_RGL_EXPECTED_LAT_5                          0x376B80
-
-#define mmSIF_RTR_CTRL_7_RGL_EXPECTED_LAT_6                          0x376B84
-
-#define mmSIF_RTR_CTRL_7_RGL_EXPECTED_LAT_7                          0x376B88
-
-#define mmSIF_RTR_CTRL_7_RGL_TOKEN_0                                 0x376BAC
-
-#define mmSIF_RTR_CTRL_7_RGL_TOKEN_1                                 0x376BB0
-
-#define mmSIF_RTR_CTRL_7_RGL_TOKEN_2                                 0x376BB4
-
-#define mmSIF_RTR_CTRL_7_RGL_TOKEN_3                                 0x376BB8
-
-#define mmSIF_RTR_CTRL_7_RGL_TOKEN_4                                 0x376BBC
-
-#define mmSIF_RTR_CTRL_7_RGL_TOKEN_5                                 0x376BC0
-
-#define mmSIF_RTR_CTRL_7_RGL_TOKEN_6                                 0x376BC4
-
-#define mmSIF_RTR_CTRL_7_RGL_TOKEN_7                                 0x376BC8
-
-#define mmSIF_RTR_CTRL_7_RGL_BANK_ID_0                               0x376BEC
-
-#define mmSIF_RTR_CTRL_7_RGL_BANK_ID_1                               0x376BF0
-
-#define mmSIF_RTR_CTRL_7_RGL_BANK_ID_2                               0x376BF4
-
-#define mmSIF_RTR_CTRL_7_RGL_BANK_ID_3                               0x376BF8
-
-#define mmSIF_RTR_CTRL_7_RGL_BANK_ID_4                               0x376BFC
-
-#define mmSIF_RTR_CTRL_7_RGL_BANK_ID_5                               0x376C00
-
-#define mmSIF_RTR_CTRL_7_RGL_BANK_ID_6                               0x376C04
-
-#define mmSIF_RTR_CTRL_7_RGL_BANK_ID_7                               0x376C08
-
-#define mmSIF_RTR_CTRL_7_RGL_WDT                                     0x376C2C
-
-#define mmSIF_RTR_CTRL_7_E2E_AR_HBM0_CH0_CTR_WRAP                    0x376C30
-
-#define mmSIF_RTR_CTRL_7_E2E_AR_HBM0_CH1_CTR_WRAP                    0x376C34
-
-#define mmSIF_RTR_CTRL_7_E2E_AR_HBM1_CH0_CTR_WRAP                    0x376C38
-
-#define mmSIF_RTR_CTRL_7_E2E_AR_HBM1_CH1_CTR_WRAP                    0x376C3C
-
-#define mmSIF_RTR_CTRL_7_E2E_AR_HBM2_CH0_CTR_WRAP                    0x376C40
-
-#define mmSIF_RTR_CTRL_7_E2E_AR_HBM2_CH1_CTR_WRAP                    0x376C44
-
-#define mmSIF_RTR_CTRL_7_E2E_AR_HBM3_CH0_CTR_WRAP                    0x376C48
-
-#define mmSIF_RTR_CTRL_7_E2E_AR_HBM3_CH1_CTR_WRAP                    0x376C4C
-
-#define mmSIF_RTR_CTRL_7_E2E_AR_HBM0_CH0_CTR_CNT                     0x376C50
-
-#define mmSIF_RTR_CTRL_7_E2E_AR_HBM0_CH1_CTR_CNT                     0x376C54
-
-#define mmSIF_RTR_CTRL_7_E2E_AR_HBM1_CH0_CTR_CNT                     0x376C58
-
-#define mmSIF_RTR_CTRL_7_E2E_AR_HBM1_CH1_CTR_CNT                     0x376C5C
-
-#define mmSIF_RTR_CTRL_7_E2E_AR_HBM2_CH0_CTR_CNT                     0x376C60
-
-#define mmSIF_RTR_CTRL_7_E2E_AR_HBM2_CH1_CTR_CNT                     0x376C64
-
-#define mmSIF_RTR_CTRL_7_E2E_AR_HBM3_CH0_CTR_CNT                     0x376C68
-
-#define mmSIF_RTR_CTRL_7_E2E_AR_HBM3_CH1_CTR_CNT                     0x376C6C
-
-#define mmSIF_RTR_CTRL_7_E2E_AW_HBM0_CH0_CTR_WRAP                    0x376C70
-
-#define mmSIF_RTR_CTRL_7_E2E_AW_HBM0_CH1_CTR_WRAP                    0x376C74
-
-#define mmSIF_RTR_CTRL_7_E2E_AW_HBM1_CH0_CTR_WRAP                    0x376C78
-
-#define mmSIF_RTR_CTRL_7_E2E_AW_HBM1_CH1_CTR_WRAP                    0x376C7C
-
-#define mmSIF_RTR_CTRL_7_E2E_AW_HBM2_CH0_CTR_WRAP                    0x376C80
-
-#define mmSIF_RTR_CTRL_7_E2E_AW_HBM2_CH1_CTR_WRAP                    0x376C84
-
-#define mmSIF_RTR_CTRL_7_E2E_AW_HBM3_CH0_CTR_WRAP                    0x376C88
-
-#define mmSIF_RTR_CTRL_7_E2E_AW_HBM3_CH1_CTR_WRAP                    0x376C8C
-
-#define mmSIF_RTR_CTRL_7_E2E_AW_HBM0_CH0_CTR_CNT                     0x376C90
-
-#define mmSIF_RTR_CTRL_7_E2E_AW_HBM0_CH1_CTR_CNT                     0x376C94
-
-#define mmSIF_RTR_CTRL_7_E2E_AW_HBM1_CH0_CTR_CNT                     0x376C98
-
-#define mmSIF_RTR_CTRL_7_E2E_AW_HBM1_CH1_CTR_CNT                     0x376C9C
-
-#define mmSIF_RTR_CTRL_7_E2E_AW_HBM2_CH0_CTR_CNT                     0x376CA0
-
-#define mmSIF_RTR_CTRL_7_E2E_AW_HBM2_CH1_CTR_CNT                     0x376CA4
-
-#define mmSIF_RTR_CTRL_7_E2E_AW_HBM3_CH0_CTR_CNT                     0x376CA8
-
-#define mmSIF_RTR_CTRL_7_E2E_AW_HBM3_CH1_CTR_CNT                     0x376CAC
-
-#define mmSIF_RTR_CTRL_7_NL_HBM_PC_SEL_0                             0x376CB0
-
-#define mmSIF_RTR_CTRL_7_NL_HBM_PC_SEL_1                             0x376CB4
-
-#define mmSIF_RTR_CTRL_7_NL_HBM_PC_SEL_2                             0x376CB8
-
-#define mmSIF_RTR_CTRL_7_NL_HBM_PC_SEL_3                             0x376CBC
-
-#endif /* ASIC_REG_SIF_RTR_CTRL_7_REGS_H_ */