mfd: dbx500-prcmu: Drop set_display_clocks()

[linux-2.6-microblaze.git] / drivers / mfd / db8500-prcmu.c

diff --git a/drivers/mfd/db8500-prcmu.c b/drivers/mfd/db8500-prcmu.c
index 26d967a..5f0cfee 100644 (file)
--- a/drivers/mfd/db8500-prcmu.c
+++ b/drivers/mfd/db8500-prcmu.c
@@ -555,14 +555,6 @@ static struct dsiescclk dsiescclk[3] = {
 #define PRCMU_CLK_38_SRC               (1 << 10)
 #define PRCMU_CLK_38_DIV               (1 << 11)
 
-/* PLLDIV=12, PLLSW=4 (PLLDDR) */
-#define PRCMU_DSI_CLOCK_SETTING                0x0000008C
-
-/* DPI 50000000 Hz */
-#define PRCMU_DPI_CLOCK_SETTING                ((1 << PRCMU_CLK_PLL_SW_SHIFT) | \
-                                         (16 << PRCMU_CLK_PLL_DIV_SHIFT))
-#define PRCMU_DSI_LP_CLOCK_SETTING     0x00000E00
-
 /* D=101, N=1, R=4, SELDIV2=0 */
 #define PRCMU_PLLDSI_FREQ_SETTING      0x00040165
 
@@ -616,28 +608,6 @@ int db8500_prcmu_disable_dsipll(void)
        return 0;
 }
 
-int db8500_prcmu_set_display_clocks(void)
-{
-       unsigned long flags;
-
-       spin_lock_irqsave(&clk_mgt_lock, flags);
-
-       /* Grab the HW semaphore. */
-       while ((readl(PRCM_SEM) & PRCM_SEM_PRCM_SEM) != 0)
-               cpu_relax();
-
-       writel(PRCMU_DSI_CLOCK_SETTING, prcmu_base + PRCM_HDMICLK_MGT);
-       writel(PRCMU_DSI_LP_CLOCK_SETTING, prcmu_base + PRCM_TVCLK_MGT);
-       writel(PRCMU_DPI_CLOCK_SETTING, prcmu_base + PRCM_LCDCLK_MGT);
-
-       /* Release the HW semaphore. */
-       writel(0, PRCM_SEM);
-
-       spin_unlock_irqrestore(&clk_mgt_lock, flags);
-
-       return 0;
-}
-
 u32 db8500_prcmu_read(unsigned int reg)
 {
        return readl(prcmu_base + reg);