iommu/amd: Re-purpose Exclusion range registers to support SNP CWWB

[linux-2.6-microblaze.git] / drivers / iommu / amd / amd_iommu_types.h

diff --git a/drivers/iommu/amd/amd_iommu_types.h b/drivers/iommu/amd/amd_iommu_types.h
index 30a5d41..f696ac7 100644 (file)
--- a/drivers/iommu/amd/amd_iommu_types.h
+++ b/drivers/iommu/amd/amd_iommu_types.h
@@ -93,6 +93,7 @@
 #define FEATURE_PC             (1ULL<<9)
 #define FEATURE_GAM_VAPIC      (1ULL<<21)
 #define FEATURE_EPHSUP         (1ULL<<50)
+#define FEATURE_SNP            (1ULL<<63)
 
 #define FEATURE_PASID_SHIFT    32
 #define FEATURE_PASID_MASK     (0x1fULL << FEATURE_PASID_SHIFT)
@@ -128,6 +129,8 @@
 #define EVENT_TYPE_IOTLB_INV_TO        0x7
 #define EVENT_TYPE_INV_DEV_REQ 0x8
 #define EVENT_TYPE_INV_PPR_REQ 0x9
+#define EVENT_TYPE_RMP_FAULT   0xd
+#define EVENT_TYPE_RMP_HW_ERR  0xe
 #define EVENT_DEVID_MASK       0xffff
 #define EVENT_DEVID_SHIFT      0
 #define EVENT_DOMID_MASK_LO    0xffff
@@ -595,7 +598,8 @@ struct amd_iommu {
 #endif
 
        u32 flags;
-       volatile u64 __aligned(8) cmd_sem;
+       volatile u64 *cmd_sem;
+       u64 cmd_sem_val;
 
 #ifdef CONFIG_AMD_IOMMU_DEBUGFS
        /* DebugFS Info */