iommu/amd: Re-purpose Exclusion range registers to support SNP CWWB

[linux-2.6-microblaze.git] / drivers / iommu / amd / amd_iommu_types.h

diff --git a/drivers/iommu/amd/amd_iommu_types.h b/drivers/iommu/amd/amd_iommu_types.h
index 1e7966c..f696ac7 100644 (file)
--- a/drivers/iommu/amd/amd_iommu_types.h
+++ b/drivers/iommu/amd/amd_iommu_types.h
@@ -93,6 +93,7 @@
 #define FEATURE_PC             (1ULL<<9)
 #define FEATURE_GAM_VAPIC      (1ULL<<21)
 #define FEATURE_EPHSUP         (1ULL<<50)
+#define FEATURE_SNP            (1ULL<<63)
 
 #define FEATURE_PASID_SHIFT    32
 #define FEATURE_PASID_MASK     (0x1fULL << FEATURE_PASID_SHIFT)