RDMA: Mark if destroy address handle is in a sleepable context
[linux-2.6-microblaze.git] / drivers / infiniband / hw / hns / hns_roce_device.h
index d39bdfd..509e467 100644 (file)
 #define PAGES_SHIFT_24                         24
 #define PAGES_SHIFT_32                         32
 
+#define HNS_ROCE_IDX_QUE_ENTRY_SZ              4
+#define SRQ_DB_REG                             0x230
+
 enum {
        HNS_ROCE_SUPPORT_RQ_RECORD_DB = 1 << 0,
        HNS_ROCE_SUPPORT_SQ_RECORD_DB = 1 << 1,
@@ -196,6 +199,7 @@ enum {
        HNS_ROCE_CAP_FLAG_RQ_INLINE             = BIT(2),
        HNS_ROCE_CAP_FLAG_RECORD_DB             = BIT(3),
        HNS_ROCE_CAP_FLAG_SQ_RECORD_DB          = BIT(4),
+       HNS_ROCE_CAP_FLAG_SRQ                   = BIT(5),
        HNS_ROCE_CAP_FLAG_MW                    = BIT(7),
        HNS_ROCE_CAP_FLAG_FRMR                  = BIT(8),
        HNS_ROCE_CAP_FLAG_ATOMIC                = BIT(10),
@@ -204,6 +208,8 @@ enum {
 enum hns_roce_mtt_type {
        MTT_TYPE_WQE,
        MTT_TYPE_CQE,
+       MTT_TYPE_SRQWQE,
+       MTT_TYPE_IDX
 };
 
 enum {
@@ -339,6 +345,10 @@ struct hns_roce_mr_table {
        struct hns_roce_hem_table       mtpt_table;
        struct hns_roce_buddy           mtt_cqe_buddy;
        struct hns_roce_hem_table       mtt_cqe_table;
+       struct hns_roce_buddy           mtt_srqwqe_buddy;
+       struct hns_roce_hem_table       mtt_srqwqe_table;
+       struct hns_roce_buddy           mtt_idx_buddy;
+       struct hns_roce_hem_table       mtt_idx_table;
 };
 
 struct hns_roce_wq {
@@ -429,9 +439,37 @@ struct hns_roce_cq {
        struct completion               free;
 };
 
+struct hns_roce_idx_que {
+       struct hns_roce_buf             idx_buf;
+       int                             entry_sz;
+       u32                             buf_size;
+       struct ib_umem                  *umem;
+       struct hns_roce_mtt             mtt;
+       u64                             *bitmap;
+};
+
 struct hns_roce_srq {
        struct ib_srq           ibsrq;
-       int                     srqn;
+       void (*event)(struct hns_roce_srq *srq, enum hns_roce_event event);
+       unsigned long           srqn;
+       int                     max;
+       int                     max_gs;
+       int                     wqe_shift;
+       void __iomem            *db_reg_l;
+
+       atomic_t                refcount;
+       struct completion       free;
+
+       struct hns_roce_buf     buf;
+       u64                    *wrid;
+       struct ib_umem         *umem;
+       struct hns_roce_mtt     mtt;
+       struct hns_roce_idx_que idx_que;
+       spinlock_t              lock;
+       int                     head;
+       int                     tail;
+       u16                     wqe_ctr;
+       struct mutex            mutex;
 };
 
 struct hns_roce_uar_table {
@@ -453,6 +491,12 @@ struct hns_roce_cq_table {
        struct hns_roce_hem_table       table;
 };
 
+struct hns_roce_srq_table {
+       struct hns_roce_bitmap          bitmap;
+       struct xarray                   xa;
+       struct hns_roce_hem_table       table;
+};
+
 struct hns_roce_raq_table {
        struct hns_roce_buf_list        *e_raq_buf;
 };
@@ -602,6 +646,12 @@ struct hns_roce_aeqe {
                        u32 rsv1;
                } qp_event;
 
+               struct {
+                       __le32 srq;
+                       u32 rsv0;
+                       u32 rsv1;
+               } srq_event;
+
                struct {
                        __le32 cq;
                        u32 rsv0;
@@ -679,7 +729,12 @@ struct hns_roce_caps {
        u32             max_extend_sg;
        int             num_qps;        /* 256k */
        int             reserved_qps;
+       u32             max_srq_sg;
+       int             num_srqs;
        u32             max_wqes;       /* 16k */
+       u32             max_srqs;
+       u32             max_srq_wrs;
+       u32             max_srq_sges;
        u32             max_sq_desc_sz; /* 64 */
        u32             max_rq_desc_sz; /* 64 */
        u32             max_srq_desc_sz;
@@ -690,12 +745,16 @@ struct hns_roce_caps {
        int             min_cqes;
        u32             min_wqes;
        int             reserved_cqs;
+       int             reserved_srqs;
+       u32             max_srqwqes;
        int             num_aeq_vectors;        /* 1 */
        int             num_comp_vectors;
        int             num_other_vectors;
        int             num_mtpts;
        u32             num_mtt_segs;
        u32             num_cqe_segs;
+       u32             num_srqwqe_segs;
+       u32             num_idx_segs;
        int             reserved_mrws;
        int             reserved_uars;
        int             num_pds;
@@ -709,6 +768,8 @@ struct hns_roce_caps {
        int             irrl_entry_sz;
        int             trrl_entry_sz;
        int             cqc_entry_sz;
+       int             srqc_entry_sz;
+       int             idx_entry_sz;
        u32             pbl_ba_pg_sz;
        u32             pbl_buf_pg_sz;
        u32             pbl_hop_num;
@@ -737,6 +798,12 @@ struct hns_roce_caps {
        u32             cqe_ba_pg_sz;
        u32             cqe_buf_pg_sz;
        u32             cqe_hop_num;
+       u32             srqwqe_ba_pg_sz;
+       u32             srqwqe_buf_pg_sz;
+       u32             srqwqe_hop_num;
+       u32             idx_ba_pg_sz;
+       u32             idx_buf_pg_sz;
+       u32             idx_hop_num;
        u32             eqe_ba_pg_sz;
        u32             eqe_buf_pg_sz;
        u32             eqe_hop_num;
@@ -805,6 +872,19 @@ struct hns_roce_hw {
        int (*modify_cq)(struct ib_cq *cq, u16 cq_count, u16 cq_period);
        int (*init_eq)(struct hns_roce_dev *hr_dev);
        void (*cleanup_eq)(struct hns_roce_dev *hr_dev);
+       void (*write_srqc)(struct hns_roce_dev *hr_dev,
+                          struct hns_roce_srq *srq, u32 pdn, u16 xrcd, u32 cqn,
+                          void *mb_buf, u64 *mtts_wqe, u64 *mtts_idx,
+                          dma_addr_t dma_handle_wqe,
+                          dma_addr_t dma_handle_idx);
+       int (*modify_srq)(struct ib_srq *ibsrq, struct ib_srq_attr *srq_attr,
+                      enum ib_srq_attr_mask srq_attr_mask,
+                      struct ib_udata *udata);
+       int (*query_srq)(struct ib_srq *ibsrq, struct ib_srq_attr *attr);
+       int (*post_srq_recv)(struct ib_srq *ibsrq, const struct ib_recv_wr *wr,
+                            const struct ib_recv_wr **bad_wr);
+       const struct ib_device_ops *hns_roce_dev_ops;
+       const struct ib_device_ops *hns_roce_dev_srq_ops;
 };
 
 struct hns_roce_dev {
@@ -839,6 +919,7 @@ struct hns_roce_dev {
        struct hns_roce_uar_table uar_table;
        struct hns_roce_mr_table  mr_table;
        struct hns_roce_cq_table  cq_table;
+       struct hns_roce_srq_table srq_table;
        struct hns_roce_qp_table  qp_table;
        struct hns_roce_eq_table  eq_table;
 
@@ -951,12 +1032,14 @@ int hns_roce_init_mr_table(struct hns_roce_dev *hr_dev);
 int hns_roce_init_eq_table(struct hns_roce_dev *hr_dev);
 int hns_roce_init_cq_table(struct hns_roce_dev *hr_dev);
 int hns_roce_init_qp_table(struct hns_roce_dev *hr_dev);
+int hns_roce_init_srq_table(struct hns_roce_dev *hr_dev);
 
 void hns_roce_cleanup_pd_table(struct hns_roce_dev *hr_dev);
 void hns_roce_cleanup_mr_table(struct hns_roce_dev *hr_dev);
 void hns_roce_cleanup_eq_table(struct hns_roce_dev *hr_dev);
 void hns_roce_cleanup_cq_table(struct hns_roce_dev *hr_dev);
 void hns_roce_cleanup_qp_table(struct hns_roce_dev *hr_dev);
+void hns_roce_cleanup_srq_table(struct hns_roce_dev *hr_dev);
 
 int hns_roce_bitmap_alloc(struct hns_roce_bitmap *bitmap, unsigned long *obj);
 void hns_roce_bitmap_free(struct hns_roce_bitmap *bitmap, unsigned long obj,
@@ -973,9 +1056,10 @@ void hns_roce_bitmap_free_range(struct hns_roce_bitmap *bitmap,
 
 struct ib_ah *hns_roce_create_ah(struct ib_pd *pd,
                                 struct rdma_ah_attr *ah_attr,
+                                u32 flags,
                                 struct ib_udata *udata);
 int hns_roce_query_ah(struct ib_ah *ibah, struct rdma_ah_attr *ah_attr);
-int hns_roce_destroy_ah(struct ib_ah *ah);
+int hns_roce_destroy_ah(struct ib_ah *ah, u32 flags);
 
 struct ib_pd *hns_roce_alloc_pd(struct ib_device *ib_dev,
                                struct ib_ucontext *context,
@@ -1011,6 +1095,14 @@ int hns_roce_buf_alloc(struct hns_roce_dev *hr_dev, u32 size, u32 max_direct,
 int hns_roce_ib_umem_write_mtt(struct hns_roce_dev *hr_dev,
                               struct hns_roce_mtt *mtt, struct ib_umem *umem);
 
+struct ib_srq *hns_roce_create_srq(struct ib_pd *pd,
+                                  struct ib_srq_init_attr *srq_init_attr,
+                                  struct ib_udata *udata);
+int hns_roce_modify_srq(struct ib_srq *ibsrq, struct ib_srq_attr *srq_attr,
+                       enum ib_srq_attr_mask srq_attr_mask,
+                       struct ib_udata *udata);
+int hns_roce_destroy_srq(struct ib_srq *ibsrq);
+
 struct ib_qp *hns_roce_create_qp(struct ib_pd *ib_pd,
                                 struct ib_qp_init_attr *init_attr,
                                 struct ib_udata *udata);
@@ -1052,6 +1144,7 @@ void hns_roce_free_db(struct hns_roce_dev *hr_dev, struct hns_roce_db *db);
 void hns_roce_cq_completion(struct hns_roce_dev *hr_dev, u32 cqn);
 void hns_roce_cq_event(struct hns_roce_dev *hr_dev, u32 cqn, int event_type);
 void hns_roce_qp_event(struct hns_roce_dev *hr_dev, u32 qpn, int event_type);
+void hns_roce_srq_event(struct hns_roce_dev *hr_dev, u32 srqn, int event_type);
 int hns_get_gid_index(struct hns_roce_dev *hr_dev, u8 port, int gid_index);
 int hns_roce_init(struct hns_roce_dev *hr_dev);
 void hns_roce_exit(struct hns_roce_dev *hr_dev);