Merge tag 'for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mst/vhost

[linux-2.6-microblaze.git] / drivers / iio / gyro / fxas21002c_core.c

diff --git a/drivers/iio/gyro/fxas21002c_core.c b/drivers/iio/gyro/fxas21002c_core.c
index 89d2bb2..129eead 100644 (file)
--- a/drivers/iio/gyro/fxas21002c_core.c
+++ b/drivers/iio/gyro/fxas21002c_core.c
@@ -42,6 +42,72 @@ enum fxas21002c_mode_state {
 
 #define FXAS21002C_AXIS_TO_REG(axis) (FXAS21002C_REG_OUT_X_MSB + ((axis) * 2))
 
+static const struct reg_field fxas21002c_reg_fields[] = {
+       [F_DR_STATUS]           = REG_FIELD(FXAS21002C_REG_STATUS, 0, 7),
+       [F_OUT_X_MSB]           = REG_FIELD(FXAS21002C_REG_OUT_X_MSB, 0, 7),
+       [F_OUT_X_LSB]           = REG_FIELD(FXAS21002C_REG_OUT_X_LSB, 0, 7),
+       [F_OUT_Y_MSB]           = REG_FIELD(FXAS21002C_REG_OUT_Y_MSB, 0, 7),
+       [F_OUT_Y_LSB]           = REG_FIELD(FXAS21002C_REG_OUT_Y_LSB, 0, 7),
+       [F_OUT_Z_MSB]           = REG_FIELD(FXAS21002C_REG_OUT_Z_MSB, 0, 7),
+       [F_OUT_Z_LSB]           = REG_FIELD(FXAS21002C_REG_OUT_Z_LSB, 0, 7),
+       [F_ZYX_OW]              = REG_FIELD(FXAS21002C_REG_DR_STATUS, 7, 7),
+       [F_Z_OW]                = REG_FIELD(FXAS21002C_REG_DR_STATUS, 6, 6),
+       [F_Y_OW]                = REG_FIELD(FXAS21002C_REG_DR_STATUS, 5, 5),
+       [F_X_OW]                = REG_FIELD(FXAS21002C_REG_DR_STATUS, 4, 4),
+       [F_ZYX_DR]              = REG_FIELD(FXAS21002C_REG_DR_STATUS, 3, 3),
+       [F_Z_DR]                = REG_FIELD(FXAS21002C_REG_DR_STATUS, 2, 2),
+       [F_Y_DR]                = REG_FIELD(FXAS21002C_REG_DR_STATUS, 1, 1),
+       [F_X_DR]                = REG_FIELD(FXAS21002C_REG_DR_STATUS, 0, 0),
+       [F_OVF]                 = REG_FIELD(FXAS21002C_REG_F_STATUS, 7, 7),
+       [F_WMKF]                = REG_FIELD(FXAS21002C_REG_F_STATUS, 6, 6),
+       [F_CNT]                 = REG_FIELD(FXAS21002C_REG_F_STATUS, 0, 5),
+       [F_MODE]                = REG_FIELD(FXAS21002C_REG_F_SETUP, 6, 7),
+       [F_WMRK]                = REG_FIELD(FXAS21002C_REG_F_SETUP, 0, 5),
+       [F_EVENT]               = REG_FIELD(FXAS21002C_REG_F_EVENT, 5, 5),
+       [FE_TIME]               = REG_FIELD(FXAS21002C_REG_F_EVENT, 0, 4),
+       [F_BOOTEND]             = REG_FIELD(FXAS21002C_REG_INT_SRC_FLAG, 3, 3),
+       [F_SRC_FIFO]            = REG_FIELD(FXAS21002C_REG_INT_SRC_FLAG, 2, 2),
+       [F_SRC_RT]              = REG_FIELD(FXAS21002C_REG_INT_SRC_FLAG, 1, 1),
+       [F_SRC_DRDY]            = REG_FIELD(FXAS21002C_REG_INT_SRC_FLAG, 0, 0),
+       [F_WHO_AM_I]            = REG_FIELD(FXAS21002C_REG_WHO_AM_I, 0, 7),
+       [F_BW]                  = REG_FIELD(FXAS21002C_REG_CTRL0, 6, 7),
+       [F_SPIW]                = REG_FIELD(FXAS21002C_REG_CTRL0, 5, 5),
+       [F_SEL]                 = REG_FIELD(FXAS21002C_REG_CTRL0, 3, 4),
+       [F_HPF_EN]              = REG_FIELD(FXAS21002C_REG_CTRL0, 2, 2),
+       [F_FS]                  = REG_FIELD(FXAS21002C_REG_CTRL0, 0, 1),
+       [F_ELE]                 = REG_FIELD(FXAS21002C_REG_RT_CFG, 3, 3),
+       [F_ZTEFE]               = REG_FIELD(FXAS21002C_REG_RT_CFG, 2, 2),
+       [F_YTEFE]               = REG_FIELD(FXAS21002C_REG_RT_CFG, 1, 1),
+       [F_XTEFE]               = REG_FIELD(FXAS21002C_REG_RT_CFG, 0, 0),
+       [F_EA]                  = REG_FIELD(FXAS21002C_REG_RT_SRC, 6, 6),
+       [F_ZRT]                 = REG_FIELD(FXAS21002C_REG_RT_SRC, 5, 5),
+       [F_ZRT_POL]             = REG_FIELD(FXAS21002C_REG_RT_SRC, 4, 4),
+       [F_YRT]                 = REG_FIELD(FXAS21002C_REG_RT_SRC, 3, 3),
+       [F_YRT_POL]             = REG_FIELD(FXAS21002C_REG_RT_SRC, 2, 2),
+       [F_XRT]                 = REG_FIELD(FXAS21002C_REG_RT_SRC, 1, 1),
+       [F_XRT_POL]             = REG_FIELD(FXAS21002C_REG_RT_SRC, 0, 0),
+       [F_DBCNTM]              = REG_FIELD(FXAS21002C_REG_RT_THS, 7, 7),
+       [F_THS]                 = REG_FIELD(FXAS21002C_REG_RT_SRC, 0, 6),
+       [F_RT_COUNT]            = REG_FIELD(FXAS21002C_REG_RT_COUNT, 0, 7),
+       [F_TEMP]                = REG_FIELD(FXAS21002C_REG_TEMP, 0, 7),
+       [F_RST]                 = REG_FIELD(FXAS21002C_REG_CTRL1, 6, 6),
+       [F_ST]                  = REG_FIELD(FXAS21002C_REG_CTRL1, 5, 5),
+       [F_DR]                  = REG_FIELD(FXAS21002C_REG_CTRL1, 2, 4),
+       [F_ACTIVE]              = REG_FIELD(FXAS21002C_REG_CTRL1, 1, 1),
+       [F_READY]               = REG_FIELD(FXAS21002C_REG_CTRL1, 0, 0),
+       [F_INT_CFG_FIFO]        = REG_FIELD(FXAS21002C_REG_CTRL2, 7, 7),
+       [F_INT_EN_FIFO]         = REG_FIELD(FXAS21002C_REG_CTRL2, 6, 6),
+       [F_INT_CFG_RT]          = REG_FIELD(FXAS21002C_REG_CTRL2, 5, 5),
+       [F_INT_EN_RT]           = REG_FIELD(FXAS21002C_REG_CTRL2, 4, 4),
+       [F_INT_CFG_DRDY]        = REG_FIELD(FXAS21002C_REG_CTRL2, 3, 3),
+       [F_INT_EN_DRDY]         = REG_FIELD(FXAS21002C_REG_CTRL2, 2, 2),
+       [F_IPOL]                = REG_FIELD(FXAS21002C_REG_CTRL2, 1, 1),
+       [F_PP_OD]               = REG_FIELD(FXAS21002C_REG_CTRL2, 0, 0),
+       [F_WRAPTOONE]           = REG_FIELD(FXAS21002C_REG_CTRL3, 3, 3),
+       [F_EXTCTRLEN]           = REG_FIELD(FXAS21002C_REG_CTRL3, 2, 2),
+       [F_FS_DOUBLE]           = REG_FIELD(FXAS21002C_REG_CTRL3, 0, 0),
+};
+
 static const int fxas21002c_odr_values[] = {
        800, 400, 200, 100, 50, 25, 12, 12
 };
@@ -905,7 +971,6 @@ int fxas21002c_core_probe(struct device *dev, struct regmap *regmap, int irq,
        if (ret < 0)
                return ret;
 
-       indio_dev->dev.parent = dev;
        indio_dev->channels = fxas21002c_channels;
        indio_dev->num_channels = ARRAY_SIZE(fxas21002c_channels);
        indio_dev->name = name;