Merge tag 'staging-5.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh...

[linux-2.6-microblaze.git] / drivers / iio / adc / stm32-adc.c

diff --git a/drivers/iio/adc/stm32-adc.c b/drivers/iio/adc/stm32-adc.c
index 3b291d7..80c3f96 100644 (file)
--- a/drivers/iio/adc/stm32-adc.c
+++ b/drivers/iio/adc/stm32-adc.c
@@ -117,7 +117,9 @@ struct stm32_adc_regs {
  * struct stm32_adc_regspec - stm32 registers definition
  * @dr:                        data register offset
  * @ier_eoc:           interrupt enable register & eocie bitfield
+ * @ier_ovr:           interrupt enable register & overrun bitfield
  * @isr_eoc:           interrupt status register & eoc bitfield
+ * @isr_ovr:           interrupt status register & overrun bitfield
  * @sqr:               reference to sequence registers array
  * @exten:             trigger control register & bitfield
  * @extsel:            trigger selection register & bitfield
@@ -128,7 +130,9 @@ struct stm32_adc_regs {
 struct stm32_adc_regspec {
        const u32 dr;
        const struct stm32_adc_regs ier_eoc;
+       const struct stm32_adc_regs ier_ovr;
        const struct stm32_adc_regs isr_eoc;
+       const struct stm32_adc_regs isr_ovr;
        const struct stm32_adc_regs *sqr;
        const struct stm32_adc_regs exten;
        const struct stm32_adc_regs extsel;
@@ -337,7 +341,9 @@ static const unsigned int stm32f4_adc_smp_cycles[STM32_ADC_MAX_SMP + 1] = {
 static const struct stm32_adc_regspec stm32f4_adc_regspec = {
        .dr = STM32F4_ADC_DR,
        .ier_eoc = { STM32F4_ADC_CR1, STM32F4_EOCIE },
+       .ier_ovr = { STM32F4_ADC_CR1, STM32F4_OVRIE },
        .isr_eoc = { STM32F4_ADC_SR, STM32F4_EOC },
+       .isr_ovr = { STM32F4_ADC_SR, STM32F4_OVR },
        .sqr = stm32f4_sq,
        .exten = { STM32F4_ADC_CR2, STM32F4_EXTEN_MASK, STM32F4_EXTEN_SHIFT },
        .extsel = { STM32F4_ADC_CR2, STM32F4_EXTSEL_MASK,
@@ -429,7 +435,9 @@ static const unsigned int stm32h7_adc_smp_cycles[STM32_ADC_MAX_SMP + 1] = {
 static const struct stm32_adc_regspec stm32h7_adc_regspec = {
        .dr = STM32H7_ADC_DR,
        .ier_eoc = { STM32H7_ADC_IER, STM32H7_EOCIE },
+       .ier_ovr = { STM32H7_ADC_IER, STM32H7_OVRIE },
        .isr_eoc = { STM32H7_ADC_ISR, STM32H7_EOC },
+       .isr_ovr = { STM32H7_ADC_ISR, STM32H7_OVR },
        .sqr = stm32h7_sq,
        .exten = { STM32H7_ADC_CFGR, STM32H7_EXTEN_MASK, STM32H7_EXTEN_SHIFT },
        .extsel = { STM32H7_ADC_CFGR, STM32H7_EXTSEL_MASK,
@@ -506,6 +514,18 @@ static void stm32_adc_conv_irq_disable(struct stm32_adc *adc)
                           adc->cfg->regs->ier_eoc.mask);
 }
 
+static void stm32_adc_ovr_irq_enable(struct stm32_adc *adc)
+{
+       stm32_adc_set_bits(adc, adc->cfg->regs->ier_ovr.reg,
+                          adc->cfg->regs->ier_ovr.mask);
+}
+
+static void stm32_adc_ovr_irq_disable(struct stm32_adc *adc)
+{
+       stm32_adc_clr_bits(adc, adc->cfg->regs->ier_ovr.reg,
+                          adc->cfg->regs->ier_ovr.mask);
+}
+
 static void stm32_adc_set_res(struct stm32_adc *adc)
 {
        const struct stm32_adc_regs *res = &adc->cfg->regs->res;
@@ -1205,6 +1225,19 @@ static int stm32_adc_read_raw(struct iio_dev *indio_dev,
        }
 }
 
+static irqreturn_t stm32_adc_threaded_isr(int irq, void *data)
+{
+       struct stm32_adc *adc = data;
+       struct iio_dev *indio_dev = iio_priv_to_dev(adc);
+       const struct stm32_adc_regspec *regs = adc->cfg->regs;
+       u32 status = stm32_adc_readl(adc, regs->isr_eoc.reg);
+
+       if (status & regs->isr_ovr.mask)
+               dev_err(&indio_dev->dev, "Overrun, stopping: restart needed\n");
+
+       return IRQ_HANDLED;
+}
+
 static irqreturn_t stm32_adc_isr(int irq, void *data)
 {
        struct stm32_adc *adc = data;
@@ -1212,6 +1245,19 @@ static irqreturn_t stm32_adc_isr(int irq, void *data)
        const struct stm32_adc_regspec *regs = adc->cfg->regs;
        u32 status = stm32_adc_readl(adc, regs->isr_eoc.reg);
 
+       if (status & regs->isr_ovr.mask) {
+               /*
+                * Overrun occurred on regular conversions: data for wrong
+                * channel may be read. Unconditionally disable interrupts
+                * to stop processing data and print error message.
+                * Restarting the capture can be done by disabling, then
+                * re-enabling it (e.g. write 0, then 1 to buffer/enable).
+                */
+               stm32_adc_ovr_irq_disable(adc);
+               stm32_adc_conv_irq_disable(adc);
+               return IRQ_WAKE_THREAD;
+       }
+
        if (status & regs->isr_eoc.mask) {
                /* Reading DR also clears EOC status flag */
                adc->buffer[adc->bufi] = stm32_adc_readw(adc, regs->dr);
@@ -1441,6 +1487,8 @@ static int __stm32_adc_buffer_postenable(struct iio_dev *indio_dev)
        /* Reset adc buffer index */
        adc->bufi = 0;
 
+       stm32_adc_ovr_irq_enable(adc);
+
        if (!adc->dma_chan)
                stm32_adc_conv_irq_enable(adc);
 
@@ -1481,6 +1529,8 @@ static void __stm32_adc_buffer_predisable(struct iio_dev *indio_dev)
        if (!adc->dma_chan)
                stm32_adc_conv_irq_disable(adc);
 
+       stm32_adc_ovr_irq_disable(adc);
+
        if (adc->dma_chan)
                dmaengine_terminate_sync(adc->dma_chan);
 
@@ -1746,9 +1796,21 @@ static int stm32_adc_dma_request(struct iio_dev *indio_dev)
        struct dma_slave_config config;
        int ret;
 
-       adc->dma_chan = dma_request_slave_channel(&indio_dev->dev, "rx");
-       if (!adc->dma_chan)
+       adc->dma_chan = dma_request_chan(&indio_dev->dev, "rx");
+       if (IS_ERR(adc->dma_chan)) {
+               ret = PTR_ERR(adc->dma_chan);
+               if (ret != -ENODEV) {
+                       if (ret != -EPROBE_DEFER)
+                               dev_err(&indio_dev->dev,
+                                       "DMA channel request failed with %d\n",
+                                       ret);
+                       return ret;
+               }
+
+               /* DMA is optional: fall back to IRQ mode */
+               adc->dma_chan = NULL;
                return 0;
+       }
 
        adc->rx_buf = dma_alloc_coherent(adc->dma_chan->device->dev,
                                         STM32_DMA_BUFFER_SIZE,
@@ -1818,8 +1880,9 @@ static int stm32_adc_probe(struct platform_device *pdev)
        if (adc->irq < 0)
                return adc->irq;
 
-       ret = devm_request_irq(&pdev->dev, adc->irq, stm32_adc_isr,
-                              0, pdev->name, adc);
+       ret = devm_request_threaded_irq(&pdev->dev, adc->irq, stm32_adc_isr,
+                                       stm32_adc_threaded_isr,
+                                       0, pdev->name, adc);
        if (ret) {
                dev_err(&pdev->dev, "failed to request IRQ\n");
                return ret;