drm: rockchip: vop: add rk3066 vop definitions
[linux-2.6-microblaze.git] / drivers / gpu / drm / rockchip / rockchip_vop_reg.h
index 7348c68..d837d4a 100644 (file)
 #define RK3188_REG_CFG_DONE            0x90
 /* rk3188 register definition end */
 
+/* rk3066 register definition */
+#define RK3066_SYS_CTRL0               0x00
+#define RK3066_SYS_CTRL1               0x04
+#define RK3066_DSP_CTRL0               0x08
+#define RK3066_DSP_CTRL1               0x0c
+#define RK3066_INT_STATUS              0x10
+#define RK3066_MCU_CTRL                        0x14
+#define RK3066_BLEND_CTRL              0x18
+#define RK3066_WIN0_COLOR_KEY_CTRL     0x1c
+#define RK3066_WIN1_COLOR_KEY_CTRL     0x20
+#define RK3066_WIN2_COLOR_KEY_CTRL     0x24
+#define RK3066_WIN0_YRGB_MST0          0x28
+#define RK3066_WIN0_CBR_MST0           0x2c
+#define RK3066_WIN0_YRGB_MST1          0x30
+#define RK3066_WIN0_CBR_MST1           0x34
+#define RK3066_WIN0_VIR                        0x38
+#define RK3066_WIN0_ACT_INFO           0x3c
+#define RK3066_WIN0_DSP_INFO           0x40
+#define RK3066_WIN0_DSP_ST             0x44
+#define RK3066_WIN0_SCL_FACTOR_YRGB    0x48
+#define RK3066_WIN0_SCL_FACTOR_CBR     0x4c
+#define RK3066_WIN0_SCL_OFFSET         0x50
+#define RK3066_WIN1_YRGB_MST           0x54
+#define RK3066_WIN1_CBR_MST            0x58
+#define RK3066_WIN1_VIR                        0x5c
+#define RK3066_WIN1_ACT_INFO           0x60
+#define RK3066_WIN1_DSP_INFO           0x64
+#define RK3066_WIN1_DSP_ST             0x68
+#define RK3066_WIN1_SCL_FACTOR_YRGB    0x6c
+#define RK3066_WIN1_SCL_FACTOR_CBR     0x70
+#define RK3066_WIN1_SCL_OFFSET         0x74
+#define RK3066_WIN2_MST                        0x78
+#define RK3066_WIN2_VIR                        0x7c
+#define RK3066_WIN2_DSP_INFO           0x80
+#define RK3066_WIN2_DSP_ST             0x84
+#define RK3066_HWC_MST                 0x88
+#define RK3066_HWC_DSP_ST              0x8c
+#define RK3066_HWC_COLOR_LUT0          0x90
+#define RK3066_HWC_COLOR_LUT1          0x94
+#define RK3066_HWC_COLOR_LUT2          0x98
+#define RK3066_DSP_HTOTAL_HS_END       0x9c
+#define RK3066_DSP_HACT_ST_END         0xa0
+#define RK3066_DSP_VTOTAL_VS_END       0xa4
+#define RK3066_DSP_VACT_ST_END         0xa8
+#define RK3066_DSP_VS_ST_END_F1                0xac
+#define RK3066_DSP_VACT_ST_END_F1      0xb0
+#define RK3066_REG_CFG_DONE            0xc0
+#define RK3066_MCU_BYPASS_WPORT                0x100
+#define RK3066_MCU_BYPASS_RPORT                0x200
+#define RK3066_WIN2_LUT_ADDR           0x400
+#define RK3066_DSP_LUT_ADDR            0x800
+/* rk3066 register definition end */
+
 #endif /* _ROCKCHIP_VOP_REG_H */