drm/nouveau/kms/nv50-: implement proper push buffer control logic

[linux-2.6-microblaze.git] / drivers / gpu / drm / nouveau / nvkm / engine / disp / dmacnv50.c

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacnv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacnv50.c
index 9e8a9d7..d0a7da9 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacnv50.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacnv50.c
@@ -94,6 +94,8 @@ nv50_disp_dmac_fini(struct nv50_disp_chan *chan)
                nvkm_error(subdev, "ch %d fini timeout, %08x\n", user,
                           nvkm_rd32(device, 0x610200 + (ctrl * 0x10)));
        }
+
+       chan->suspend_put = nvkm_rd32(device, 0x640000 + (ctrl * 0x1000));
 }
 
 static int
@@ -109,7 +111,7 @@ nv50_disp_dmac_init(struct nv50_disp_chan *chan)
        nvkm_wr32(device, 0x610208 + (ctrl * 0x0010), 0x00010000);
        nvkm_wr32(device, 0x61020c + (ctrl * 0x0010), ctrl);
        nvkm_mask(device, 0x610200 + (ctrl * 0x0010), 0x00000010, 0x00000010);
-       nvkm_wr32(device, 0x640000 + (ctrl * 0x1000), 0x00000000);
+       nvkm_wr32(device, 0x640000 + (ctrl * 0x1000), chan->suspend_put);
        nvkm_wr32(device, 0x610200 + (ctrl * 0x0010), 0x00000013);
 
        /* wait for it to go inactive */